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Renesas PROM Programming Adapter PCA7435FPG02 Dokumentacja Strona 32

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7534 Group
Rev.3.00 Oct 23, 2006 page 32 of 53
REJ03B0099-0300
A/D Converter
The functional blocks of the A/D converter are described below.
[A/D conversion register] AD
The A/D conversion register is a read-only register that stores the
result of A/D conversion. Do not read out this register during an A/D
conversion.
[A/D control register] ADCON
The A/D control register controls the A/D converter. Bit 2 to 0 are
analog input pin selection bits. Bit 4 is the AD conversion completion
bit. The value of this bit remains at “0” during A/D conversion, and
changes to “1” at completion of A/D conversion.
A/D conversion is started by setting this bit to “0”.
[Comparison voltage generator]
The comparison voltage generator divides the voltage between VSS
and VREF by 1024 by a resistor ladder, and outputs the divided volt-
ages. Since the generator is disconnected from VREF pin and VSS
pin, current is not flowing into the resistor ladder.
[Channel Selector]
The channel selector selects one of ports P27/AN7 to P20/AN0, and
inputs the voltage to the comparator.
[Comparator and control circuit]
The comparator and control circuit compares an analog input volt-
age with the comparison voltage and stores its result into the A/D
conversion register. When A/D conversion is completed, the control
circuit sets the AD conversion completion bit and the AD interrupt
request bit to “1”. Because the comparator is constructed linked to a
capacitor, set f(XIN) to 500 kHz or more during A/D conversion.
Fig. 35 Structure of A/D control register
Fig. 36 Structure of A/D conversion register
Fig. 37 Block diagram of A/D converter
A
/
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
A
D
C
O
N
:
a
d
d
r
e
s
s
0
0
3
4
1
6
)
N
o
t
u
s
e
d
(
r
e
t
u
r
n
s
“
0
”
w
h
e
n
r
e
a
d
)
N
o
t
u
s
e
d
(
r
e
t
u
r
n
s
“
0
”
w
h
e
n
r
e
a
d
)
A
D
c
o
n
v
e
r
s
i
o
n
c
o
m
p
l
e
t
i
o
n
b
i
t
0
:
C
o
n
v
e
r
s
i
o
n
i
n
p
r
o
g
r
e
s
s
1
:
C
o
n
v
e
r
s
i
o
n
c
o
m
p
l
e
t
e
d
b
7
b
0
A
n
a
l
o
g
i
n
p
u
t
p
i
n
s
e
l
e
c
t
i
o
n
b
i
t
s
0
0
0
:
P
2
0
/
A
N
0
0
0
1
:
P
2
1
/
A
N
1
0
1
0
:
P
2
2
/
A
N
2
0
1
1
:
P
2
3
/
A
N
3
1
0
0
:
P
2
4
/
A
N
4
1
0
1
:
P
2
5
/
A
N
5
1
1
0
:
P
2
6
/
A
N
6
1
1
1
:
P
2
7
/
A
N
7
Read 8-bit (Read only address 003516)
b7 b0
b9 b8 b7 b6 b5 b4 b3 b2
(Address 003516)
Read 10-bit (read in order address 003616, 003516)
b7
b0
b9 b8
(Address 003616)
b7
b0
b7 b6 b5 b4 b3 b2 b1 b0
(Address 003516)
High-order 6-bit of address 003616 returns “0” when read.
A
/
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
A
d
d
r
e
s
s
0
0
3
4
1
6
)
C
h
a
n
n
e
l
s
e
l
e
c
t
o
r
A/D control circuit
R
e
s
i
s
t
o
r
l
a
d
d
e
r
V
S
S
Comparator
A
/
D
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
b7 b0
D
a
t
a
b
u
s
3
1
0
P
2
0
/
A
N
0
P
2
1
/
A
N
1
P
2
2
/
A
N
2
P2
3
/AN
3
P
2
4
/
A
N
4
P
2
5
/
A
N
5
P
2
6
/
A
N
6
P
2
7
/
A
N
7
A/D conversion register (low-order)
(
A
d
d
r
e
s
s
0
0
3
6
1
6
)
(
A
d
d
r
e
s
s
0
0
3
5
1
6
)
A
/
D
c
o
n
v
e
r
s
i
o
n
r
e
g
i
s
t
e
r
(
h
i
g
h
-
o
r
d
e
r
)
V
R
E
F
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