
57
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.3
8.10.10 Data Clock Generating Circuit
This circuit generates a data clock synchronized with the start bit
detected in the start bit detecting circuit. The data clock stores cap-
tion data to the 16-bit shift register. When the 16-bit data has been
stored and the clock run-in determination circuit determines clock
run-in, the caption data latch completion flag is set. This flag is reset
at a falling of the vertical synchronous signal (Vsep).
Fig. 8.10.11 Data Clock Position Register
b
7b
6b
5b
4b
3b
2b
1b
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