Renesas PCA7429G02 Informacje Techniczne Pobierz pdf (Strona 128)

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

M37272M6/M8–XXXSP/FP, M37272MA–XXXSP

M37272E8SP/FP, M37272EFSP

MITSUBISHI MICROCOMPUTERS

Rev. 1.3

b7 b6 b5 b4 b3 b2b1 b0

Block control register i (BCi) (i=1, 2) [Addresses 00D2

and 00D3

]

Block Control register i

0, 1 Display mode

selection bits

(BCi0, BCi1)

(See note 1)

Indeterminate

2, 3 Dot size selection

bits (BCi2, BCi3)

b4 b3 b2 Pre-divide Ratio Dot Size

4 Pre-divide ratio

selection bit (BCi4)

7 Window top/bottom

boundary control bit

(BCi7)

Notes 1: Bit RA3 of OSD RAM controls OUT1 output when bit 5 is “0.”

Bit RA3 of OSD RAM controls OUT2 output when bit 5 is “1.”

2: Tc is OSD clock cycle divided in pre-divide circuit.

3: H is H

SYNC

OUT1/OUT2 output control

bit (BCi5) (See note 1)

0: OUT1 output control

1: OUT2 output control

Vertical display start

position control bit

(BCi6)

BC16: Block 1

BC26: Block 1

b1 b0

0 0: Display OFF

0 1: CC mode

1 0: OSD mode (Border OFF)

1 1: OSD mode (Border ON)

✕ 2

✕ 3

1Tc ✕ 1/2H

1Tc ✕ 1H

2Tc ✕ 2H

3Tc ✕ 3H

1Tc ✕ 1/2H

1Tc ✕ 1H

2Tc ✕ 2H

3Tc ✕ 3H

BC17: Window top boundary

BC27: Window bottom boundary

B Name Functions

After reset

Indeterminate

Address 00D116

Address 00D216, 00D316

b7 b6 b5b4 b3 b2 b1 b0

Horizontal position register (HP) [Address 00D1

]

B Name

Horizontal Position Register

Horizontal display start

position control bits

(HP0 to HP6)

Nothing is assigned. This bit is a write disable bit.

When this bit is read out, the value is “0.”

Functions After reset R W

Horizontal display start positions

128 steps (00

to 7F

)

(1 step is 4T

OSC

)

R—

Note: The setting value synchronizes with the V

SYNC

1 2 ... 123 124 125 126 127 128 129 130 131 132 133 ... 144 145

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