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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6/M8–XXXSP/FP, M37272MA–XXXSP
M37272E8SP/FP, M37272EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.3
8. FUNCTIONAL DESCRIPTION
8.1 CENTRAL PROCESSING UNIT (CPU)
This microcomputer uses the standard 740 Family instruction set.
Refer to the table of 740 Family addressing modes and machine
instructions or the SERIES 740 <Software> User’s Manual for de-
tails on the instruction set.
Machine-resident 740 Family instructions are as follows:
The FST, SLW instruction cannot be used.
The MUL, DIV, WIT and STP instructions can be used.
8.1.1 CPU Mode Register
The CPU mode register contains the stack page selection bit and
internal system clock selection bit. The CPU mode register is allo-
cated at address 00FB
16.
Fig. 8.1.1 CPU Mode Register
b
7b
6 b
5b
4b
3 b
2b
1b
0
B
A
f
t
e
r
r
e
s
e
t
RW
C
P
U
M
o
d
e
R
e
g
i
s
t
e
r
0
,
1
2
3
,
4
0
1
N
a
m
eF
u
n
c
t
i
o
n
s
P
r
o
c
e
s
s
o
r
m
o
d
e
b
i
t
s
(
C
M
0
,
C
M
1
)
0
0
:
S
i
n
g
l
e
-
c
h
i
p
m
o
d
e
0
1
:
1
0
:
N
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t
a
v
a
i
l
a
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1
1
:
F
i
x
t
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t
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1
.
1
S
t
a
c
k
p
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e
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o
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b
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(
C
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2
) (
S
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o
t
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)
1
b
1
b
0
0
:
0
p
a
g
e
1
:
1
p
a
g
e
1
0
0
5
1
6
0
M
a
i
n
C
l
o
c
k
(
X
I
N
X
O
U
T
)
s
t
o
p
b
i
t
(
C
M
6
)
C
P
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m
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d
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r
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t
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r
(
C
M
)
[
A
d
d
r
e
s
s
0
0
F
B
1
6
]
R
W
RW
R
W
R
W
RW
X
C
O
U
T
d
r
i
v
a
b
i
l
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t
y
s
e
l
e
c
t
i
o
n
b
i
t
(
C
M
5
)
0
:
L
O
W
d
r
i
v
e
1
:
H
I
G
H
d
r
i
v
e
0
:
O
s
c
i
l
l
a
t
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g
1
:
S
t
o
p
p
e
d
7
0
I
n
t
e
r
n
a
l
s
y
s
t
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m
c
l
o
c
k
s
e
l
e
c
t
i
o
n
b
i
t
(
C
M
7
)
RW
0
:
X
I
N
X
O
U
T
s
e
l
e
c
t
e
d
(
h
i
g
h
-
s
p
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e
d
m
o
d
e
)
1
:
X
C
I
N
X
C
O
U
T
s
e
l
e
c
t
e
d
(
h
i
g
h
-
s
p
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e
d
m
o
d
e
)
N
o
t
e
:
T
h
i
s
b
i
t
i
s
s
e
t
t
o
1
a
f
t
e
r
t
h
e
r
e
s
e
t
r
e
l
e
a
s
e
.
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