Renesas R8C/15 Informacje Techniczne

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology C

A - 413.2.2 Programmable Waveform Generation Mode...10513.2.3 Programmable One-shot Generation Mode ...

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 86 of 253REJ09B0164-0210Figure 13.3 PREX, TX and TCSS RegistersPrescaler X RegisterSy

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 87 of 253REJ09B0164-021013.1.1 Timer ModeTimer mode is mode to count the count source

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 88 of 253REJ09B0164-021013.1.2 Pulse Output ModePulse output mode is mode to count th

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 89 of 253REJ09B0164-0210Figure 13.5 TXMR Register in Pulse Output ModeTimer X Mode Re

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 90 of 253REJ09B0164-021013.1.3 Event Counter ModeEvent counter mode is mode to count

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 91 of 253REJ09B0164-0210Figure 13.6 TXMR Register in Event Counter ModeTimer X Mode R

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 92 of 253REJ09B0164-021013.1.4 Pulse Width Measurement ModePulse width measurement mo

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 93 of 253REJ09B0164-0210Figure 13.7 TXMR Register in Pulse Width Measurement ModeTime

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 94 of 253REJ09B0164-0210Figure 13.8 Operating Example in Pulse Width Measurement Mode

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 95 of 253REJ09B0164-021013.1.5 Pulse Period Measurement ModePulse period measurement

A - 516.2 Repeat Mode...17416.3 Sample and Hold...

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 96 of 253REJ09B0164-0210Figure 13.9 TXMR Register in Pulse Period Measurement ModeTim

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 97 of 253REJ09B0164-0210Figure 13.10 Operating Example in Pulse Period Measurement Mo

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 98 of 253REJ09B0164-021013.2 Timer ZTimer Z is an 8-bit timer with an 8-bit prescaler

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 99 of 253REJ09B0164-0210Figure 13.12 TZMR RegisterTimer Z Mode RegisterSymbol Address

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 100 of 253REJ09B0164-0210Figure 13.13 PREZ, TZSC and TZPR RegistersPrescaler Z Regist

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 101 of 253REJ09B0164-0210Figure 13.14 TZOC and PUM RegistersTimer Z Output Control Re

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 102 of 253REJ09B0164-0210Figure 13.15 TCSS RegisterTimer Count Source Setting Registe

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 103 of 253REJ09B0164-021013.2.1 Timer ModeTimer mode is mode to count a count source

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 104 of 253REJ09B0164-0210Figure 13.16 TZMR and PUM Registers in Timer ModeTimer Z Wav

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 105 of 253REJ09B0164-021013.2.2 Programmable Waveform Generation ModeProgrammable wav

A - 620.2.1 Reading Address 00000h...23620.2.2 SP Setting...

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 106 of 253REJ09B0164-0210Figure 13.17 TZMR and PUM Registers in Programmable Waveform

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 107 of 253REJ09B0164-0210Figure 13.18 Operating Example of Timer Z in Programmable Wa

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 108 of 253REJ09B0164-021013.2.3 Programmable One-shot Generation ModeProgrammable one

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 109 of 253REJ09B0164-0210Figure 13.19 TZMR and PUM Registers in Programmable One-Shot

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 110 of 253REJ09B0164-0210Figure 13.20 Operating Example in Programmable One-Shot Gene

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 111 of 253REJ09B0164-021013.2.4 Programmable Wait One-shot Generation ModeProgrammabl

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 112 of 253REJ09B0164-0210NOTES:1. Set the TZS bit in the TZMR register to “1” (count

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 113 of 253REJ09B0164-0210Figure 13.21 TZMR and PUM Registers in Programmable Wait One

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 114 of 253REJ09B0164-0210Figure 13.22 Operating Example in Programmable Wait One-Shot

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 115 of 253REJ09B0164-021013.3 Timer CTimer C is a 16-bit timer. Figure 13.23 shows th

B - 1NOTES:1. Blank columns are all reserved space. No access is allowed.Address Register Symbol Page0000h0001h0002h0003h0004h Processor Mode Register

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 116 of 253REJ09B0164-0210Figure 13.24 Block Diagram of CMP Waveform Generation UnitFi

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 117 of 253REJ09B0164-0210Figure 13.26 TC, TM0 and TM1 RegistersTimer C RegisterSymbol

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 118 of 253REJ09B0164-0210Figure 13.27 TCC0 RegisterTimer C Control Register 0Symbol A

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 119 of 253REJ09B0164-0210Figure 13.28 TCC1 RegisterTimer C Control Register 1Symbol A

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 120 of 253REJ09B0164-0210Figure 13.29 TCOUT RegisterTimer C Output Control Register(1

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 121 of 253REJ09B0164-021013.3.1 Input Capture ModeInput capture mode is mode to input

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 122 of 253REJ09B0164-0210Figure 13.30 Operating Example in Input Capture ModeFFFFh000

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 123 of 253REJ09B0164-021013.3.2 Output Compare ModeOutput compare mode is mode to gen

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 124 of 253REJ09B0164-0210Figure 13.31 Operating Example in Output Compare ModeSet val

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 125 of 253REJ09B0164-021014. Serial InterfaceSerial Interface is configured

B - 2NOTES:1. Blank columns, 0100h to 01AFh and 01C0h to 02FFh are all reserved. No access is allowed. Address Register Symbol Page0080h Timer Z Mode

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 126 of 253REJ09B0164-0210Figure 14.2 UART0 Transmit/Receive UnitRXD01SP2SPS

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 127 of 253REJ09B0164-0210Figure 14.3 U0TB, U0RB and U0BRG RegistersUART0 Re

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 128 of 253REJ09B0164-0210Figure 14.4 U0MR and U0C0 RegistersUART0 Transmit

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 129 of 253REJ09B0164-0210Figure 14.5 U0C1 and UCON RegistersUART0 Transmit

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 130 of 253REJ09B0164-021014.1 Clock Synchronous Serial I/O ModeThe clock sy

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 131 of 253REJ09B0164-0210NOTES:1. Set bits which are not in this table to “

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 132 of 253REJ09B0164-0210Figure 14.6 Transmit and Receive OperationTransfer

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 133 of 253REJ09B0164-021014.1.1 Polarity Select Function Figure 14.7 shows

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 134 of 253REJ09B0164-021014.1.3 Continuous Receive ModeContinuous receive m

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 135 of 253REJ09B0164-021014.2 Clock Asynchronous Serial I/O (UART) ModeThe

Rev.2.10 Jan 19, 2006 Page 1 of 253REJ09B0164-0210R8C/14 Group, R8C/15 GroupSINGLE-CHIP 16-BIT CMOS MICROCOMPUTER1. Overview This MCU is built using t

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 136 of 253REJ09B0164-0210NOTES:1. The bits used for transmit/receive data a

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 137 of 253REJ09B0164-0210Figure 14.9 Transmit Timing in UART ModeTransfer C

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 138 of 253REJ09B0164-0210Figure 14.10 Receive Timing in UART Mode14.2.1 CNT

R8C/14 Group, R8C/15 Group 14. Serial Interface Rev.2.10 Jan 19, 2006 Page 139 of 253REJ09B0164-021014.2.2 Bit RateDivided-by-16 of frequency by the U

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 140 of 253REJ09B0164-021015. Clock Synch

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 141 of 253REJ09B0164-0210Figure 15.1 Blo

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 142 of 253REJ09B0164-0210Figure 15.2 SSC

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 143 of 253REJ09B0164-0210Figure 15.3 SSC

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 144 of 253REJ09B0164-0210Figure 15.4 SSM

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 145 of 253REJ09B0164-0210Figure 15.5 SSE

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 2 of 253REJ09B0164-02101.2 Performance OverviewTable 1.1 lists the Performance Outli

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 146 of 253REJ09B0164-0210Figure 15.6 SSS

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 147 of 253REJ09B0164-0210Figure 15.7 SSM

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 148 of 253REJ09B0164-0210Figure 15.8 SST

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 149 of 253REJ09B0164-021015.1 Transfer C

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 150 of 253REJ09B0164-0210Figure 15.9 Ass

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 151 of 253REJ09B0164-021015.2 SS Shift R

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 152 of 253REJ09B0164-021015.3 Interrupt

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 153 of 253REJ09B0164-021015.4 Communicat

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 154 of 253REJ09B0164-021015.5 Clock Sync

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 155 of 253REJ09B0164-021015.5.2 Data Tra

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 3 of 253REJ09B0164-0210Table 1.2 Performance Outline of the R8C/15 GroupItem Perform

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 156 of 253REJ09B0164-0210Figure 15.13 Sa

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 157 of 253REJ09B0164-021015.5.3 Data Rec

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 158 of 253REJ09B0164-0210Figure 15.15 Sa

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 159 of 253REJ09B0164-021015.5.4 Data Tra

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 160 of 253REJ09B0164-0210Figure 15.16 Sa

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 161 of 253REJ09B0164-021015.6 Operation

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 162 of 253REJ09B0164-0210Figure 15.17 In

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 163 of 253REJ09B0164-021015.6.2 Data Tra

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 164 of 253REJ09B0164-0210Figure 15.18 Ex

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 165 of 253REJ09B0164-021015.6.3 Data Rec

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 4 of 253REJ09B0164-02101.3 Block DiagramFigure 1.1 shows a Block Diagram.Figure 1.1

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 166 of 253REJ09B0164-0210Figure 15.19 Ex

R8C/14 Group, R8C/15 Group 15. Clock Synchronous Serial I/O with Chip Select (SSU) Rev.2.10 Jan 19, 2006 Page 167 of 253REJ09B0164-021015.6.4 SCS Pin

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 168 of 253REJ09B0164-021016. A/D ConverterThe A/D converter consists of one 10

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 169 of 253REJ09B0164-0210Figure 16.1 Block Diagram of A/D ConverterAVSSCKS0=1D

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 170 of 253REJ09B0164-0210Figure 16.2 ADCON0 and ADCON1 RegistersA/D Control Re

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 171 of 253REJ09B0164-0210Figure 16.3 ADCON2 and AD RegistersA/D Control Regist

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 172 of 253REJ09B0164-021016.1 One-Shot ModeIn one-shot mode, the input voltage

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 173 of 253REJ09B0164-0210Figure 16.4 ADCON0 and ADCON1 Registers in One-Shot M

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 174 of 253REJ09B0164-021016.2 Repeat ModeIn repeat mode, the input voltage on

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 175 of 253REJ09B0164-0210Figure 16.5 ADCON0 and ADCON1 Registers in Repeat Mod

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 5 of 253REJ09B0164-02101.4 Product InformationTable 1.3 lists the Product Informatio

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 176 of 253REJ09B0164-021016.3 Sample and HoldWhen the SMP bit in the ADCON2 re

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 177 of 253REJ09B0164-021016.5 Internal Equivalent Circuit of Analog InputFigur

R8C/14 Group, R8C/15 Group 16. A/D Converter Rev.2.10 Jan 19, 2006 Page 178 of 253REJ09B0164-021016.6 Inflow Current Bypass CircuitFigure 16.9 shows t

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 179 of 253REJ09B0164-021017. Programmable I/O PortsProgrammable Input

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 180 of 253REJ09B0164-0210Figure 17.1 Configuration of Programmable I/

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 181 of 253REJ09B0164-0210Figure 17.2 Configuration of Programmable I/

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 182 of 253REJ09B0164-0210Figure 17.3 Configuration of Programmable I/

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 183 of 253REJ09B0164-0210Figure 17.4 Configuration of I/O PinsMODEMOD

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 184 of 253REJ09B0164-0210Figure 17.5 PD1, PD3 and PD4 RegistersFigure

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 185 of 253REJ09B0164-0210Figure 17.7 PUR0 and PUR1 RegistersFigure 17

Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to chang

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 6 of 253REJ09B0164-0210Figure 1.3 Part Number, Memory Size and Package of R8C/15 Gro

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 186 of 253REJ09B0164-021017.4 Port settingTable 17.4 to Table 17.17 l

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 187 of 253REJ09B0164-0210X: “0” or “1”X: “0” or “1”Table 17.7 Port P1

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 188 of 253REJ09B0164-0210X: “0” or “1”X: “0” or “1”X: “0” or “1”X: “0

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 189 of 253REJ09B0164-0210X: “0” or “1”X: “0” or “1”X: “0” or “1”X: “0

R8C/14 Group, R8C/15 Group 17. Programmable I/O Ports Rev.2.10 Jan 19, 2006 Page 190 of 253REJ09B0164-021017.5 Unassigned Pin HandlingTable 17.18 list

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 191 of 253REJ09B0164-021018. Flash Memory Version18.1 OverviewIn the fl

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 192 of 253REJ09B0164-0210Table 18.2 Flash Memory Rewrite ModesFlash Mem

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 193 of 253REJ09B0164-021018.2 Memory MapThe flash memory contains a use

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 194 of 253REJ09B0164-0210Figure 18.2 Flash Memory Block Diagram for R8C

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 195 of 253REJ09B0164-021018.3 Functions To Prevent Flash Memory from Re

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 7 of 253REJ09B0164-02101.5 Pin AssignmentsFigure 1.4 shows the PLSP0020JB-A Package

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 196 of 253REJ09B0164-021018.3.2 ROM Code Protect FunctionThe ROM code p

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 197 of 253REJ09B0164-021018.4 CPU Rewrite ModeIn CPU rewrite mode, user

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 198 of 253REJ09B0164-021018.4.1 EW0 ModeThe microcomputer enters CPU re

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 199 of 253REJ09B0164-0210Figure 18.5 shows the FMR0 Register. Figure 18

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 200 of 253REJ09B0164-021018.4.2.10 FMR40 bitThe erase-suspend function

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 201 of 253REJ09B0164-0210Figure 18.6 FMR1 and FMR4 RegistersFlash Memor

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 202 of 253REJ09B0164-0210Figure 18.7 shows the Timing on Suspend Operat

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 203 of 253REJ09B0164-0210Figure 18.8 shows the How to Set and Exit EW0

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 204 of 253REJ09B0164-0210Figure 18.10 Process to Reduce Power Consumpti

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 205 of 253REJ09B0164-021018.4.3 Software CommandsSoftware commands are

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 8 of 253REJ09B0164-02101.6 Pin DescriptionTable 1.5 lists the Pin Description and Ta

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 206 of 253REJ09B0164-021018.4.3.4 Program CommandThe program command wr

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 207 of 253REJ09B0164-021018.4.3.5 Block EraseIf writing ”20h” in the fi

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 208 of 253REJ09B0164-0210Figure 18.13 Block Erase Command (When Using E

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 209 of 253REJ09B0164-021018.4.4 Status RegisterThe status register indi

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 210 of 253REJ09B0164-021018.4.5 Full Status CheckWhen an error occurs,

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 211 of 253REJ09B0164-0210Figure 18.14 Full Status Check and Handling Pr

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 212 of 253REJ09B0164-021018.5 Standard Serial I/O ModeIn standard seria

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 213 of 253REJ09B0164-0210Table 18.8 Pin Functions (Flash Memory Standar

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 214 of 253REJ09B0164-0210Figure 18.15 Pin Connections for Standard Seri

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 215 of 253REJ09B0164-021018.5.1.1 Example of Circuit Application in the

R8C/14 Group, R8C/15 Group 1. Overview Rev.2.10 Jan 19, 2006 Page 9 of 253REJ09B0164-0210Table 1.6 Pin Name Information by Pin NumberPin NumberControl

R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 216 of 253REJ09B0164-021018.6 Parallel I/O ModeParallel I/O mode is use

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 217 of 253REJ09B0164-021019. Electrical CharacteristicsNOTES:1. V

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 218 of 253REJ09B0164-0210NOTES:1. VCC = AVCC = 2.7 to 5.5V at Top

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 219 of 253REJ09B0164-0210NOTES:1. VCC = AVcc = 2.7 to 5.5V at Top

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 220 of 253REJ09B0164-0210NOTES:1. VCC = AVcc = 2.7 to 5.5V at Top

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 221 of 253REJ09B0164-0210Figure 19.2 Time delay from Suspend Requ

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 222 of 253REJ09B0164-0210NOTES:1. This condition is not applicabl

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 223 of 253REJ09B0164-0210NOTES:1. The measurement condition is VC

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 224 of 253REJ09B0164-0210Figure 19.4 I/O Timing of Clock Synchron

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 225 of 253REJ09B0164-0210Figure 19.5 I/O Timing of Clock Synchron

R8C/14 Group, R8C/15 Group 2. Central Processing Unit (CPU) Rev.2.10 Jan 19, 2006 Page 10 of 253REJ09B0164-02102. Central Processing Unit (CPU)Figure

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 226 of 253REJ09B0164-0210Figure 19.6 I/O Timing of Clock Synchron

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 227 of 253REJ09B0164-0210NOTES:1. VCC = AVCC = 4.2 to 5.5V at Top

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 228 of 253REJ09B0164-0210Table 19.14 Electrical Characteristics (

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 229 of 253REJ09B0164-0210Timing Requirements (Unless otherwise sp

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 230 of 253REJ09B0164-0210Figure 19.7 Timing Diagram When VCC = 5V

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 231 of 253REJ09B0164-0210NOTES:1. VCC = AVCC = 2.7 to 3.3V at Top

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 232 of 253REJ09B0164-0210Table 19.21 Electrical Characteristics (

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 233 of 253REJ09B0164-0210Timing requirements (Unless otherwise sp

R8C/14 Group, R8C/15 Group 19. Electrical Characteristics Rev.2.10 Jan 19, 2006 Page 234 of 253REJ09B0164-0210Figure 19.8 Timing Diagram When VCC = 3V

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 235 of 253REJ09B0164-021020. Precautions20.1 Stop Mode and Wait Mode20.1.1 Stop

R8C/14 Group, R8C/15 Group 2. Central Processing Unit (CPU) Rev.2.10 Jan 19, 2006 Page 11 of 253REJ09B0164-02102.1 Data Registers (R0, R1, R2 and R3)R

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 236 of 253REJ09B0164-021020.2 Interrupts20.2.1 Reading Address 00000hDo not read

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 237 of 253REJ09B0164-021020.2.5 Changing Interrupt FactorThe IR bit in the inter

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 238 of 253REJ09B0164-021020.2.6 Changing Interrupt Control Register(a) Each inte

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 239 of 253REJ09B0164-021020.3 Clock Generation Circuit20.3.1 Oscillation Stop De

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 240 of 253REJ09B0164-021020.4 Timers20.4.1 Timers X and Z• Timers X and Z stop c

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 241 of 253REJ09B0164-021020.4.3 Timer Z• Do not rewrite the TZMOD0 to TZMOD1 bit

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 242 of 253REJ09B0164-021020.5 Serial Interface• When reading data from the U0RB

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 243 of 253REJ09B0164-021020.6 Clock Synchronous Serial I/O (SSU) with Chip Selec

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 244 of 253REJ09B0164-021020.7 A/D Converter• Write to each bit (other than bit 6

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 245 of 253REJ09B0164-021020.8 Flash Memory Version20.8.1 CPU Rewrite Mode20.8.1.

R8C/14 Group, R8C/15 Group 2. Central Processing Unit (CPU) Rev.2.10 Jan 19, 2006 Page 12 of 253REJ09B0164-02102.8.7 Interrupt Enable Flag (I Flag)The

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 246 of 253REJ09B0164-0210NOTES:1. Do not use the address match interrupt while t

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 247 of 253REJ09B0164-021020.8.1.4 How to AccessWrite “0” to the corresponding bi

R8C/14 Group, R8C/15 Group 20. Precautions Rev.2.10 Jan 19, 2006 Page 248 of 253REJ09B0164-021020.9 Noise20.9.1 Insert a bypass capacitor between VCC

R8C/14 Group, R8C/15 Group 21. Precaution for On-chip Debugger Rev.2.10 Jan 19, 2006 Page 249 of 253REJ09B0164-021021. Precaution for On-chip Debugger

R8C/14 Group, R8C/15 Group Appendix 1. Package Dimensions Rev.2.10 Jan 19, 2006 Page 250 of 253REJ09B0164-0210Appendix 1. Package DimensionsyIndex mar

R8C/14 Group, R8C/15 Group Appendix 2. Connecting Example between Serial Writer and On-Chip Debugging Rev.2.10 Jan 19, 2006 Page 251 of 253REJ09B0164-

R8C/14 Group, R8C/15 Group Appendix 3. Example of Oscillation Evaluation Circuit Rev.2.10 Jan 19, 2006 Page 252 of 253REJ09B0164-0210Appendix 3. Examp

Rev.2.10 Jan 19, 2006 Page 253 of 253REJ09B0164-0210R8C/14 Group, R8C/15 Group Register IndexAAD ...171ADCON0 .

C - 1REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware Rev. DateDescriptionPage Summary0.10 May 17, 2004− First Edition issued0.20 Jul 12, 2004− Re

C - 2REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware Rev. DateDescriptionPage Summary0.30 Aug 06, 2004 110112114118119121123125130131136138140141

R8C/14 Group, R8C/15 Group 3. Memory Rev.2.10 Jan 19, 2006 Page 13 of 253REJ09B0164-02103. Memory3.1 R8C/14 Group Figure 3.1 is a Memory Map of R8C/14

C - 3REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware Rev. DateDescriptionPage Summary1.00 Feb 25, 2005 2-3567-81618202224252627293031323334353739

C - 4REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware Rev. DateDescriptionPage Summary1.00 Feb 25, 2005 141145147149152157158160162163164168169171

C - 5REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware Rev. DateDescriptionPage Summary2.00 Jan 12, 2006 1 1. Overview; “20-pin plastic molded LSS

C - 6REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware 2.00 Jan 12, 2006 32 Table 6.2 Setting Procedure of Voltage Monitor 1 Reset Associated Bit r

C - 7REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware 2.00 Jan 12, 2006 76 11.4 Address Match Interrupt;“... , do not use an address match interru

C - 8REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware 2.00 Jan 12, 2006 103 Table 13.7 Specification of Timer Mode;“• When writing ... registers (

C - 9REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware 2.00 Jan 12, 2006 193 18.2 Memory Map;“The user ROM ... area ... Block A and B.” → “The user

C - 10REVISION HISTORY R8C/14 Group, R8C/15 Group Hardware 2.00 Jan 12, 2006 228 Table 19.14 Electrical Characteristics (2) [Vcc = 5V] NOTE1 deleted2

R8C/14 Group, R8C/15 Group Hardware ManualPublication Data : Rev.0.10 May 17, 2004Rev.2.10 Jan 19, 2006Published by : Sales Strategic Planning Div.R

1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 JapanR8C/14 Group, R8C/15 GroupREJ09B0164-0210Hardware Manual

R8C/14 Group, R8C/15 Group 3. Memory Rev.2.10 Jan 19, 2006 Page 14 of 253REJ09B0164-02103.2 R8C/15 Group Figure 3.2 is a Memory Map of R8C/15 Group. T

R8C/14 Group, R8C/15 Group 4. Special Function Register (SFR) Rev.2.10 Jan 19, 2006 Page 15 of 253REJ09B0164-02104. Special Function Register (SFR)SFR

R8C/14 Group, R8C/15 GroupHardware Manual16Hardware ManualRev.2.10 2006.01.RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTERM16C FAMILY / R8C/Tiny SERIESAll

R8C/14 Group, R8C/15 Group 4. Special Function Register (SFR) Rev.2.10 Jan 19, 2006 Page 16 of 253REJ09B0164-0210Table 4.2 SFR Information(2)(1)X: Und

R8C/14 Group, R8C/15 Group 4. Special Function Register (SFR) Rev.2.10 Jan 19, 2006 Page 17 of 253REJ09B0164-0210Table 4.3 SFR Information(3)(1)X: Und

R8C/14 Group, R8C/15 Group 4. Special Function Register (SFR) Rev.2.10 Jan 19, 2006 Page 18 of 253REJ09B0164-0210Table 4.4 SFR Information(4)(1)X: Und

R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 19 of 253REJ09B0164-02105. ResetThere are resets: hardware reset, power-on reset, volta

R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 20 of 253REJ09B0164-0210Table 5.2 shows the Pin Status after Reset, Figure 5.2 shows CP

R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 21 of 253REJ09B0164-02105.1 Hardware ResetA reset is applied using the RESET pin. When

R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 22 of 253REJ09B0164-0210Figure 5.4 Example of Hardware Reset Circuit and OperationFigur

R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 23 of 253REJ09B0164-02105.2 Power-On Reset FunctionWhen the RESET pin is connected to t

R8C/14 Group, R8C/15 Group 5. Reset Rev.2.10 Jan 19, 2006 Page 24 of 253REJ09B0164-02105.3 Voltage Monitor 1 Reset A reset is applied using the built-

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 25 of 253REJ09B0164-02106. Voltage Detection CircuitThe voltage det

Keep safety first in your circuit designs!Notes regarding these materials1.Renesas Technology Corp. puts the maximum effort into making semiconductor

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 26 of 253REJ09B0164-0210Figure 6.1 Block Diagram of Voltage Detecti

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 27 of 253REJ09B0164-0210Figure 6.3 Block Diagram of Voltage Monitor

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 28 of 253REJ09B0164-0210Figure 6.4 VCA1 and VCA2 RegistersVoltage D

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 29 of 253REJ09B0164-0210Figure 6.5 VW1C RegisterVoltage Monitor 1 C

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 30 of 253REJ09B0164-0210Figure 6.6 VW2C RegisterVoltage Monitor 2 C

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 31 of 253REJ09B0164-02106.1 Monitoring VCC Input Voltage 6.1.1 Moni

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 32 of 253REJ09B0164-02106.2 Voltage Monitor 1 ResetTable 6.2 lists

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 33 of 253REJ09B0164-02106.3 Voltage Monitor 2 Interrupt and Voltage

R8C/14 Group, R8C/15 Group 6. Voltage Detection Circuit Rev.2.10 Jan 19, 2006 Page 34 of 253REJ09B0164-0210Figure 6.8 Operating Example of Voltage Mon

R8C/14 Group, R8C/15 Group 7. Processor Mode Rev.2.10 Jan 19, 2006 Page 35 of 253REJ09B0164-02107. Processor Mode7.1 Types of Processor ModeSingle-chi

How to Use This Manual1. IntroductionThis hardware manual provides detailed information on the R8C/14 Group, R8C/15 Group of microcomputers.Users are

R8C/14 Group, R8C/15 Group 7. Processor Mode Rev.2.10 Jan 19, 2006 Page 36 of 253REJ09B0164-0210Figure 7.2 PM1 RegisterProcessor Mode Register 1(1)Sym

R8C/14 Group, R8C/15 Group 8. Bus Rev.2.10 Jan 19, 2006 Page 37 of 253REJ09B0164-02108. BusDuring access, the ROM/RAM and SFR vary from bus cycles. Ta

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 38 of 253REJ09B0164-02109. Clock Generation CircuitThe MCU has two o

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 39 of 253REJ09B0164-0210Figure 9.1 Clock Generation CircuitSQR1/2 1/

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 40 of 253REJ09B0164-0210Figure 9.2 CM0 RegisterSystem Clock Control

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 41 of 253REJ09B0164-0210Figure 9.3 CM1 RegisterSystem Clock Control

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 42 of 253REJ09B0164-0210Figure 9.4 OCD RegisterOscillation Stop Dete

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 43 of 253REJ09B0164-0210Figure 9.5 HRA0 RegisterHigh-speed On-Chip O

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 44 of 253REJ09B0164-0210Figure 9.6 HRA1 and HRA2 RegistersHigh-speed

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 45 of 253REJ09B0164-0210The following describes the clocks generated

3. M16C Family DocumentsThe following documents were prepared for the M16C family.(1)NOTES:1. Before using this material, please visit the our website

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 46 of 253REJ09B0164-02109.2 On-Chip Oscillator ClockThis clock is su

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 47 of 253REJ09B0164-02109.3 CPU Clock and Peripheral Function ClockT

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 48 of 253REJ09B0164-02109.4 Power ControlThere are three power contr

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 49 of 253REJ09B0164-02109.4.1.1 High-Speed ModeThe main clock divide

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 50 of 253REJ09B0164-02109.4.2.4 Exiting Wait ModeThe microcomputer e

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 51 of 253REJ09B0164-02109.4.3 Stop ModeSince the oscillator circuits

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 52 of 253REJ09B0164-0210Figure 9.8 shows the State Transition of Pow

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 53 of 253REJ09B0164-02109.5 Oscillation Stop Detection FunctionThe o

R8C/14 Group, R8C/15 Group 9. Clock Generation Circuit Rev.2.10 Jan 19, 2006 Page 54 of 253REJ09B0164-0210Figure 9.9 Procedure of Switching Clock Sour

R8C/14 Group, R8C/15 Group 10. Protection Rev.2.10 Jan 19, 2006 Page 55 of 253REJ09B0164-021010. ProtectionProtection function protects important regi

A - 1SFR Page Reference B - 11. Overview 11.1 Applications...

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 56 of 253REJ09B0164-021011. Interrupt11.1 Interrupt Overview11.1.1 Types of Interr

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 57 of 253REJ09B0164-021011.1.2 Software InterruptsA software interrupt is generate

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 58 of 253REJ09B0164-021011.1.3 Special InterruptsSpecial interrupts are non-maskab

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 59 of 253REJ09B0164-021011.1.5 Interrupts and Interrupt VectorThere are 4 bytes in

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 60 of 253REJ09B0164-021011.1.5.2 Relocatable Vector TablesThe relocatable vector t

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 61 of 253REJ09B0164-021011.1.6 Interrupt ControlThe following describes enable/dis

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 62 of 253REJ09B0164-0210Figure 11.4 INT0IC RegisterINT0 Interrupt Control Register

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 63 of 253REJ09B0164-021011.1.6.1 I FlagThe I flag enables or disables the maskable

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 64 of 253REJ09B0164-021011.1.6.4 Interrupt SequenceAn interrupt sequence is perfor

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 65 of 253REJ09B0164-021011.1.6.5 Interrupt Response TimeFigure 11.6 shows an Inter

A - 24. Special Function Register (SFR) 155. Reset 195.1 Hardware Reset ...

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 66 of 253REJ09B0164-021011.1.6.7 Saving a RegisterIn the interrupt sequence, the F

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 67 of 253REJ09B0164-021011.1.6.8 Returning from an Interrupt RoutineWhen the REIT

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 68 of 253REJ09B0164-021011.1.6.10 Interrupt Priority Judgement CircuitThe interrup

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 69 of 253REJ09B0164-021011.2 INT Interrupt11.2.1 INT0 InterruptThe INT0 interrupt

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 70 of 253REJ09B0164-021011.2.2 INT0 Input FilterThe INT0 input contains a digital

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 71 of 253REJ09B0164-021011.2.3 INT1 InterruptThe INT1 interrupt is generated by IN

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 72 of 253REJ09B0164-021011.2.4 INT3 InterruptThe INT3 interrupt is generated by th

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 73 of 253REJ09B0164-0210Figure 11.16 TCC1 RegisterTimer C Control Register 1Symbol

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 74 of 253REJ09B0164-021011.3 Key Input InterruptA key input interrupt request is g

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 75 of 253REJ09B0164-0210Figure 11.18 KIEN RegisterKey Input Enable Register(1)Symb

A - 39.4.1 Normal Operating Mode...489.4.2 Wait Mode ...

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 76 of 253REJ09B0164-021011.4 Address Match InterruptAn address match interrupt req

R8C/14 Group, R8C/15 Group 11. Interrupt Rev.2.10 Jan 19, 2006 Page 77 of 253REJ09B0164-0210Figure 11.19 AIER, RMAD0 to RMAD1 RegistersAddress Match I

R8C/14 Group, R8C/15 Group 12. Watchdog Timer Rev.2.10 Jan 19, 2006 Page 78 of 253REJ09B0164-021012. Watchdog TimerThe watchdog timer is a function to

R8C/14 Group, R8C/15 Group 12. Watchdog Timer Rev.2.10 Jan 19, 2006 Page 79 of 253REJ09B0164-0210Figure 12.2 OFS and WDC RegistersWatchdog Timer Contr

R8C/14 Group, R8C/15 Group 12. Watchdog Timer Rev.2.10 Jan 19, 2006 Page 80 of 253REJ09B0164-0210Figure 12.3 WDTR, WDTS and CSPR RegistersWatchdog Tim

R8C/14 Group, R8C/15 Group 12. Watchdog Timer Rev.2.10 Jan 19, 2006 Page 81 of 253REJ09B0164-021012.1 When Count Source Protection Mode DisabledThe co

R8C/14 Group, R8C/15 Group 12. Watchdog Timer Rev.2.10 Jan 19, 2006 Page 82 of 253REJ09B0164-021012.2 When Count Source Protection Mode EnabledThe cou

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 83 of 253REJ09B0164-021013. TimersThe microcomputer contains two 8-bit timers with 8-

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 84 of 253REJ09B0164-021013.1 Timer XTimer X is an 8-bit timer with an 8-bit prescaler

R8C/14 Group, R8C/15 Group 13. Timers Rev.2.10 Jan 19, 2006 Page 85 of 253REJ09B0164-0210Figure 13.2 TXMR RegisterTimer X Mode RegisterSymbol Address