Renesas MN4 Dokumentacja Pobierz pdf (Strona 22)

V850E2/MN4 UARTJ Control

R01AN0926EJ0100 Rev.1.00 Page 22 of 30

Feb 07, 2012

4.2.7 UARTJn Status Clear Register 0 (URTJnSTC)

The error flags in URTJnSTR1 are set when a data consistency error, a parity error, a framing error, and an overrun

error occur. The URTJnSTC register can be used to clear the error flags in URTJnSTR1.

In this sample program, the corresponding error flags are cleared by using the URTJnSTC and URTJnFSTC registers

when INTUAJnTIS is detected.

Figure 4.14 URTJnSTC Register Format

Setting example:

URTJnSTC = 0x1f; /* Clear receive error flags */

/* Clear transmit/receive data consistency error flag */

/* Clear receive parity error flag */

/* Clear receive framing error flag */

/* Clear receive overrun error flag */

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 32 33

Brak uwag

Renesas MN4 Dokumentacja Strona 22