Renesas SH7709S Instrukcja Użytkownika Pobierz pdf (Strona 23)

Rev. 1.0, 07/03, page 19 of 38

2.1.9 HM5257165B-A6 (8 Mwords × 16 bits × 4 banks)

Bus State Controller (BSC) Settings: When an SDRAM (HM5257165B-A6) is connected to

area 3 of the SH7709S/SH7729R/SH7706 via a 16-bit bus, the bus state controller (BSC) must be

specified as summarized below. Table 2.7 lists the BSC register settings.

Note that the interface between SDRAM and the SH7709S/SH7729R/SH7706 is performed with

bus clock = 66 MHz, CL = 2, TPC = 2, RCD = 2, TRWL = 1, and TRAS = 4.

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 43 44

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Renesas SH7709S Instrukcja Użytkownika Strona 23