Renesas Single-Chip Microcomputer M38C89T-ADF Instrukcja Użytkownika Strona 71

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Rev.1.00 May 22 2012
REJ09B0566
4-51
3BLibrary Reference
R_BSC_CreateArea
4
4.2.5 36BBus State Controller
Select the number of bits of ROW Address for Area 3
PDL_BSC_A3ROW_11 or
PDL_BSC_A3ROW_12 or
PDL_BSC_A3ROW_13
Select the Number of Bit use to select ROW Address
for Area 3
Select the number of bits of COL Address for Area 3
PDL_BSC_A3COL_8 or
PDL_BSC_A3COL_9 or
PDL_BSC_A3COL_10
Select the Number of Bit use to select COL Address
for Area 3
Deep Power Down mode
PDL_BSC_DEEP_ENABLE or
PDL_BSC_DEEP_DISABLE
Enable or disable the Deep Power Down mode
Low Frequency Mode
PDL_BSC_SLOW_DISABLE or
PDL_BSC_SLOW_ENABLE
Enable or disable the LOW Frequency Mode
Refresh Mode
PDL_BSC_RFSH_DISABLE or
PDL_BSC_RFSH_ENABLE
Enable or disable the Refresh mode
Refresh Type
PDL_BSC_RMODE_AUTO or
PDL_BSC_RMODE_SELF
Select the Type of refresh operation to be performed
Power Down mode
PDL_BSC_PDOWN_DISBLE or
PDL_BSC_PDOWN_ENABLE
Enable or disable the Power Down mode
Bank Active mode
PDL_BSC_BACTV_DISBLE or
PDL_BSC_BACTV_ENABLE
Enable or disable the BANK Active Mode
[data4]
Configure the BUS options
ENDIANESS Select
PDL_BSC_BIG_ENDIAN or
PDL_BSC_LITTLE_ENDIAN
Select the type of Endianess for the BUS
IWW Cycles
data21 values Configure the data21 value for IWW cycles
IWRWD Cycles
data22 values Configure the data22 value for IWRWD cycles
IWRWS Cycles
data23 values Configure the data23 value for IWRWS cycles
IWRRD Cycles
data24 values Configure the data24 value for IWRRD cycles
IWRRS Cycles
data25 values Configure the data25 value for IWRRS cycles
DMAIW Cycles
data26 values Configure the data26 value for DMAIW cycles
[data5]
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