Renesas Asynchronous SH7145F Instrukcja Użytkownika Pobierz pdf (Strona 7)

SH7145 Group

SCI Break Detection

REJ06B0384-0100Z/Rev.1.00 September 2004 Page 7 of 20

4. Description of Software

4.1 Modules

Table 4 describes the modules of this sample task.

Table 4 Description of Modules

Module Name

Label

Name Functions

Main routine main Calls various modules.

SCI routine init_sci Initializes SCI0 and CMT0.

Receive routine rcv_sci Receives serial data.

Error processing routine err_int Performs reception error processing.

CMT0 interrupt routine cmt_int Reads RxD pin level at 5 msec intervals.

4.2 Internal Registers

Tables 5 through 7 describe the internal registers used in this sample task. The settings are the values used in this

sample task and are different from their initial values.

Table 5 Description of Internal Registers (1)

Name Bit Bit Name Setting Function

Module standby control register 1

MSTCR1

0 MSTP16 0 SCI0 standby control bit

When MSTP16 = 0, cancels the standby state.

Module standby control register 2 MSTCR2

12 MSTP12 0 CMT standby control bit

When MSTP12 = 0, cancels the standby state of the CMT.

H'10 Serial control register_0

Controls transmission/reception and interrupts and selects

transmit/receive clock source.

7 TIE 0 Transmit interrupt enable

Set to 1 to enable TXI interrupt requests.

6 RIE 0 Receive interrupt enable

Set to 1 to enable RXI and ERI interrupt requests.

5 TE 0 Transmit enable

Set to 1 to enable transmission.

4 RE 1 Receive enable

Set to 1 to enable reception.

3 MPIE 0

Multiprocessor interrupt enable (valid in asynchronous

mode when MP = 1 in SMR)

In this sample task, this bit is invalid because of MP = 0.

2 TEIE 0 Transmit end interrupt enable

Set to 1 to enable TEI interrupt requests.

SCR_0

CKE1

CKE0

Clock enable 1, 0

These bits select the clock source and SCK pin function. In

this sample task, the clock source is an internal clock and

the SCK pin is not used.

1 2 3 4 5 6 7 8 9 10 11 12 ... 19 20

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