
SH7145 Group
SCI Break Detection
REJ06B0384-0100Z/Rev.1.00 September 2004 Page 17 of 20
/* Initialize SCI asynchronous mode */
P_SCI0.SCR_0.BYTE &= 0x03 ; /* Clear TIE,RIE,TE,RE,MPIE,TEIE bit */
P_SCI0.SCR_0.BIT.CKE = 0; /* Clock:internal,SCK:output */
P_SCI0.SMR_0.BYTE = 0x00; /* 8bit,No parity,1stop bit */
// CA = 0; /* Asynchronous mode */
// CHR = 0; /* Data length 8 bits */
// PE = 0; /* Non-parity */
// OE = 0; /* (=0)even parity */
// STOP = 0; /* 1 stop bit */
// CKS = 0; /* Clock source = P phi(25MHz) */
P_SCI0.BRR_0 = 40; /* 19200bps@25MHz */
P_SCI0.SDCR_0.BIT.DIR = 0; /* LSB first */
for( i=0; i < 0x0400 ; i++); /* Wait 1 bit */
/* Initialize SCI0 PORT */
P_PORTA.PACRL2.BIT.PA0MD = 1; /* Set RXD0(PA1:130pin@SH7145) */
P_SCI0.SCR_0.BIT.RE = 1; /* RE=1,receive enable */
}
/***********************************************************************************************/
/* Function : rcv_sci */
/* Operation : Receive serial data(SCI0) */
/* Asynchronous Receive Mode */
/***********************************************************************************************/
unsigned char rcv_sci(unsigned char rev_count )
{
while(P_SCI0.SSR_0.BIT.RDRF == 0){ /* Wait until RDRF flag high level */
err(); /* Error judging */
/* Judging break detect */
if(P_SCI0.SCR_0.BIT.RE == 0) /* Break detect */
break;
}
Rev_data[rev_count] = P_SCI0.RDR_0; /* Store receive data */
P_SCI0.SSR_0.BIT.RDRF = 0; /* Clear RDRF flag */
rev_count++ ; /* Storing address increment */
return(rev_count);
}
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