Renesas SH7050 Series Informacje Techniczne Pobierz pdf (Strona 20)

Default:

Figure 2.1 Default User System Interface Circuit

Mode Pins (MD3, MD2, MD1 and MD0):

The mode pins are only monitored. The operation

modes and clock modes depend on the HDI settings.

Figure 2.2 User System Interface Circuit for Mode Pins

RES, NMI and HSTBY:

The RES, NMI, and HSTBY signals are input to the MCU through the

emulator control circuit. The rising/falling time of these signals must be 8 ns/V or less.

Figure 2.3 User System Interface Circuit for RES, NMI, and HSTBY

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Renesas SH7050 Series Informacje Techniczne Strona 20