Renesas H8S/2138 Series Instrukcja Obsługi

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Hitachi Single-Chip Microcomputer
H8S Series Technical Q&A
H8S/2655
H8S/2350
H8S/2355
H8S/2357
H8S/2345
H8S/2245
H8S/2148
H8S/2144
H8S/2138
H8S/2134
H8S/2128
H8S/2124
Application Note
ADE-502-059
Rev. 1.0
2/98
Hitachi, Ltd
Ougi T
Przeglądanie stron 0
1 2 3 4 5 6 ... 147 148

Podsumowanie treści

Strona 1 - Application Note

Hitachi Single-Chip MicrocomputerH8S Series Technical Q&AH8S/2655H8S/2350H8S/2355H8S/2357H8S/2345H8S/2245H8S/2148H8S/2144H8S/2138H8S/2134H8S/2128H

Strona 2

Microcomputer Technical Q&A2Q&A No.: QAH8S-002Category: CPUSubject: Difference between V Flag and C Flag in CCRQuestionThe V flag and C flag i

Strona 3

Microcomputer Technical Q&A92Q&A No.: QAH8S-218Category: TPUSubject: Non-Timer Use of PortQuestionHow can the TIOC I/O port be used for a purp

Strona 4 - Using this Application Note

Microcomputer Technical Q&A93Q&A No.: QAH8S-219Category: TPUSubject: Cascaded ConnectionQuestionCan cascaded connection be used with the TPU?A

Strona 5 - Contents

Microcomputer Technical Q&A94Q&A No.: QAH8S-220Category: TPUSubject: Dual Use of PWM Mode 1 and Input CaptureQuestionWhen TPU channels 0 and 3

Strona 6 - Electrical Characteristics

Microcomputer Technical Q&A95Q&A No.: QAH8S-221Category: TPUSubject: Setting PWM Mode 2 CycleQuestionWhich register is used to set the cycle i

Strona 7

Microcomputer Technical Q&A96Q&A No.: QAH8S-222Category: TPUSubject: Synchronous Operation of Two SetsQuestionIs synchronous operation of two

Strona 8 - Clock Pulse Generator

Microcomputer Technical Q&A97Q&A No.: QAH8S-223Category: TPUSubject: Two-Phase PWM OutputQuestionIs it possible to obtain two-phase PWM output

Strona 9 - Q&A No.: QAH8S-001

Microcomputer Technical Q&A98Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 Yes H

Strona 10 - Category: CPU

Microcomputer Technical Q&A99Q&A No.: QAH8S-224Category: WDTSubject: Interval Timer with Arbitrary Time IntervalQuestionWhen the WDT is used a

Strona 11

Microcomputer Technical Q&A100Q&A No.: QAH8S-225Category: SCISubject: SCI InitializationQuestionIn SCI initialization, why is there a minimum

Strona 12 - Q&A No.: QAH8S-003

Microcomputer Technical Q&A101Q&A No.: QAH8S-226Category: SCISubject: Difference between TDRE Flag and TEND FlagQuestionWhat is the difference

Strona 13 - Q&A No.: QAH8S-004

Microcomputer Technical Q&A3Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/23

Strona 14 - Q&A No.: QAH8S-005

Microcomputer Technical Q&A102Q&A No.: QAH8S-227Category: SCISubject: Initial State of TxD PinQuestionWhat happens to the initial value of the

Strona 15 - Subject: MAC Register

Microcomputer Technical Q&A103Q&A No.: QAH8S-228Category: SCISubject: Maximum External Clock Input Value (Asynchronous Mode)QuestionWhat is th

Strona 16 - Subject: EXR Register

Microcomputer Technical Q&A104Q&A No.: QAH8S-229Category: SCISubject: Transmit/Receive Operation in Synchronous ModeQuestionCan reception alon

Strona 17 - Subject: SUBX Instruction

Microcomputer Technical Q&A105Q&A No.: QAH8S-230Category: SCISubject: SCI Transmission Using DTCQuestionIs it possible to performs SCI transmi

Strona 18 - Subject: BRN Instruction

Microcomputer Technical Q&A106Q&A No.: QAH8S-231Category: SCISubject: Permissible Bit Rate Error in Asynchronous ModeQuestionWhat is the permi

Strona 19 - Q&A No.: QAH8S-010

Microcomputer Technical Q&A107012340123 4 567P5 5 6 7 8 150 1 5 6 7 8 141501316 clocks160 clocksStart Stop StartTYP.ABCLKRxD (Typ)RxD (Typ)RxD (Mi

Strona 20 - Q&A No.: QAH8S-011

Microcomputer Technical Q&A108However, if the transmitting side is fast, the next frame will begin before completion of the receiveoperation, and

Strona 21 - Instruction

Microcomputer Technical Q&A109Q&A No.: QAH8S-232Category: SCISubject: Operation of RDRF FlagQuestionAn operation to clear the RDRF flag to 0 i

Strona 22 - Q&A No.: QAH8S-013

Microcomputer Technical Q&A110Q&A No.: QAH8S-233Category: SCISubject: RDRF Flag Set TimingQuestionsWhen data reception ends, the RDRF flag is

Strona 23 - Subject: Stack Precautions

Microcomputer Technical Q&A111Answers1. The RDRF flag is set following the fall of the data sampling clock after the stop bit data isreceived (see

Strona 24 - Subject: Stack Pointer

Microcomputer Technical Q&A4Q&A No.: QAH8S-003Category: CPUSubject: Relationship between Data Size and Change of V FlagQuestionDo changes of t

Strona 25 - Subject: TAS Instruction

Microcomputer Technical Q&A1122. The RDRF flag is set following the fall of the serial clock after the MSB data is received (seefigure below).Bit

Strona 26 - Q&A No.: QAH8S-017

Microcomputer Technical Q&A113Q&A No.: QAH8S-234Category: SCISubject: Interrupt Source Flag ClearingQuestionIf a receive-error interrupt is ge

Strona 27

Microcomputer Technical Q&A114Q&A No.: QAH8S-235Category: SCISubject: Continuous Transmission/Reception in Synchronous Mode UsingExternal Cloc

Strona 28 - Q&A No.: QAH8S-018

Microcomputer Technical Q&A115Q&A No.: QAH8S-236Category: SCISubject: Use of RDR and TDR when SCI is Not UsedQuestionsCan the following regist

Strona 29

Microcomputer Technical Q&A116Q&A No.: QAH8S-237Category: SCISubject: SCI Clock Pin Input/Output SettingQuestionWhen the SCI is used, is the i

Strona 30 - Subject: Mode Pins

Microcomputer Technical Q&A117Q&A No.: QAH8S-238Category: SCISubject: Serial Internal I/O Pin StatesQuestionAfter the TxD, RxD, and SCK pins—w

Strona 31 - Subject: Use of RAME Bit

Microcomputer Technical Q&A118Q&A No.: QAH8S-239Category: SCISubject: Setting Asynchronous ModeQuestionWhen performing asynchronous mode trans

Strona 32 - Subject: Reset

Microcomputer Technical Q&A1192. Performing first byte setting at the same time as SCI settingSCI setting processingInterrupt waitCounter setting:

Strona 33

Microcomputer Technical Q&A120In both of the above cases, the TXI interrupt handling routine flowchart is as shown below.TXI interruptcount++count

Strona 34 - Disabled

Microcomputer Technical Q&A121Q&A No.: QAH8S-240Category: SCISubject: Data Transfer to TDRQuestionsSRAMH8S Series chipData transmission SCIDMA

Strona 35 - Q&A No.: QAH8S-023

Microcomputer Technical Q&A5Q&A No.: QAH8S-004Category: CPUSubject: Area Usable as ROM in Vector TableQuestions1. Can a free area in the vecto

Strona 36 - Q&A No.: QAH8S-024

Microcomputer Technical Q&A122Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/

Strona 37 - Q&A No.: QAH8S-025

Microcomputer Technical Q&A123Q&A No.: QAH8S-241Category: SCISubject: TDRE Flag Set TimingQuestionsWhen data transmission ends, the TDRE flag

Strona 38 - Q&A No.: QAH8S-026

Microcomputer Technical Q&A124AnswersThe TDRE set timing differs depending on whether or not the transmit shift register (TSR)contains transmit da

Strona 39 - Q&A No.: QAH8S-027

Microcomputer Technical Q&A125b. When TSR does not contain transmit data (see figure below)9910111213141516 1 2 3 4 5 6 7 8 10111213141516 1 2 3 4

Strona 40 - Q&A No.: QAH8S-028

Microcomputer Technical Q&A1262. Synchronous modea. When TSR contains transmit data (see figure below)When SCK clock source is internal clock: 2 s

Strona 41 - Q&A No.: QAH8S-029

Microcomputer Technical Q&A127Q&A No.: QAH8S-242Category: SCISubject: Phases of System Clock and SCKQuestionIs SCK (the serial clock transfer

Strona 42

Microcomputer Technical Q&A128Q&A No.: QAH8S-243Category: A/D ConverterSubject: Idea Behind External C and RQuestionWhat is the idea behind th

Strona 43 - Q&A No.: QAH8S-030

Microcomputer Technical Q&A129A/D converter equivalent circuitCAD ≈ 20 pFRAD ≈ 10 kΩRoutLow-pass filter CPermissible signal source impedanceSensor

Strona 44 - Category: Bus Controller

Microcomputer Technical Q&A130Q&A No.: QAH8S-244Category: A/D ConverterSubject: A/D Conversion in Simultaneous Sampling OperationQuestionHow d

Strona 45 - Subject:

Microcomputer Technical Q&A131Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 H8S/

Strona 46 - Subject: WAIT (1)

Microcomputer Technical Q&A6Q&A No.: QAH8S-005Category: CPUSubject: H8S/2000 CPU Normal ModeQuestionAre any precautions required when making a

Strona 47 - Subject: WAIT (2)

Microcomputer Technical Q&A132Q&A No.: QAH8S-245Category: A/D ConverterSubject: A/D Conversion Time in Simultaneous Sampling OperationQuestion

Strona 48

Microcomputer Technical Q&A133Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 H8S/

Strona 49 - Q&A No.: QAH8S-035

Microcomputer Technical Q&A134Q&A No.: QAH8S-246Category: I/O PortsSubject: I/O Port ManipulationQuestionWhen a particular bit of an I/O port

Strona 50

Microcomputer Technical Q&A135Q&A No.: QAH8S-247Category: I/O PortsSubject: Reserved BitsQuestionWrite data rules are sometimes given for rese

Strona 51 - Q&A No.: QAH8S-036

Microcomputer Technical Q&A136Q&A No.: QAH8S-248Category: I/O PortsSubject: Disabling φ OutputQuestionIs there any way of fixing φ output high

Strona 52 - Q&A No.: QAH8S-037

Microcomputer Technical Q&A137Q&A No.: QAH8S-249Category: I/O PortsSubject: Port 3 Open-Drain OutputQuestionPort 3 pins are multiplexed as SCI

Strona 53 - Q&A No.: QAH8S-038

Microcomputer Technical Q&A138Q&A No.: QAH8S-250Category: I/O PortsSubject: Multiplexing as IRQ3 and LWRQuestionThe PF3 pin is also multiplexe

Strona 54

Microcomputer Technical Q&A139Q&A No.: QAH8S-251Category: Clock Pulse GeneratorSubject: Crystal Resonator Capacitance ValueQuestionCrystal res

Strona 55 - Q&A No.: QAH8S-039

H8S Series Technical Q&A Application NotePublication Date: 1st Edition, February 1998Published by: Semiconductor and IC Div.Hitachi, Ltd.Edited by

Strona 56 - Q&A No.: QAH8S-040

Microcomputer Technical Q&A7Q&A No.: QAH8S-006Category: CPUSubject: MAC RegisterQuestionWhy is the MAC register 42 bits long?AnswerThe MAC reg

Strona 57 - Q&A No.: QAH8S-041

Microcomputer Technical Q&A8Q&A No.: QAH8S-007Category: CPUSubject: EXR RegisterQuestionWhy has the EXR registers been added?AnswerThere are t

Strona 58 - Q&A No.: QAH8S-042

Microcomputer Technical Q&A9Q&A No.: QAH8S-008Category: InstructionSubject: SUBX InstructionQuestionWhy is the Z flag value unchanged when the

Strona 59 - Q&A No.: QAH8S-043

Microcomputer Technical Q&A10Q&A No.: QAH8S-009Category: InstructionSubject: BRN InstructionQuestionWhat kind of instruction is BRN (BF)?Answe

Strona 60 - Subject: 2-CAS DRAM Interface

Microcomputer Technical Q&A11Q&A No.: QAH8S-010Category: InstructionSubject: Difference between BRA Instruction and JMP InstructionQuestionWha

Strona 61

NoticeWhen using this document, keep the following in mind:1. This document may, wholly or partially, be subject to change without notice.2. All rig

Strona 62 - Subject: Medium-Speed Mode

Microcomputer Technical Q&A12Q&A No.: QAH8S-011Category: InstructionSubject: BRA and BRN InstructionsQuestions1. What does it mean when the BR

Strona 63 - Q&A No.: QAH8S-046

Microcomputer Technical Q&A13Q&A No.: QAH8S-012Category: InstructionSubject: Support of DAA (DAS) Instruction Corresponding to INC (DEC)Instru

Strona 64 - Q&A No.: QAH8S-047

Microcomputer Technical Q&A14Q&A No.: QAH8S-013Category: InstructionSubject: Odd Address Value when STC Instruction is ExecutedQuestionThe man

Strona 65 - Q&A No.: QAH8S-048

Microcomputer Technical Q&A15Q&A No.: QAH8S-014Category: InstructionSubject: Stack PrecautionsQuestionAre any precautions required concerning

Strona 66 - Q&A No.: QAH8S-049

Microcomputer Technical Q&A16Q&A No.: QAH8S-015Category: InstructionSubject: Stack PointerQuestionHow should the stack pointer (SP: ER7) be in

Strona 67 - Subject: Module Stop Mode

Microcomputer Technical Q&A17Q&A No.: QAH8S-016Category: InstructionSubject: TAS InstructionQuestionWhat is the meaning of the test and set in

Strona 68 - Q&A No.: QAH8S-051

Microcomputer Technical Q&A18Q&A No.: QAH8S-017Category: InstructionSubject: BLD and BIST InstructionsQuestionHow are bit-manipulation instruc

Strona 69 - Q&A No.: QAH8S-052

Microcomputer Technical Q&A19Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 70 - Subject: RD Signal Timing

Microcomputer Technical Q&A20Q&A No.: QAH8S-018Category: InstructionSubject: BOR and BIAND InstructionsQuestionHow are bit-manipulation instru

Strona 71

Microcomputer Technical Q&A21Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 72 - Category: Pins

PrefaceThe H8S/2000 Series is a new series of Hitachi-original high-performance 16-bit microcomputersdesigned to offer higher performance and lower po

Strona 73 - Q&A No.: QAH8S-055

Microcomputer Technical Q&A22Q&A No.: QAH8S-019Category: MCU Operating ModesSubject: Mode PinsQuestions1. Is it possible to change the MCU ope

Strona 74 - Q&A No.: QAH8S-056

Microcomputer Technical Q&A23Q&A No.: QAH8S-020Category: MCU Operating ModesSubject: Use of RAME BitQuestionHow is the RAME bit used?AnswerThe

Strona 75

Microcomputer Technical Q&A24Q&A No.: QAH8S-021Category: Exception HandlingSubject: ResetQuestionA reset time of at least 20 ms is specified.

Strona 76 - Q&A No.: QAH8S-057

Microcomputer Technical Q&A25Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 77 - Subject: WDTOVF Pin

Microcomputer Technical Q&A26Q&A No.: QAH8S-022Category: InterruptsSubject: Handling of Interrupt Requests when IRQ Interrupts areDisabledQues

Strona 78

Microcomputer Technical Q&A27Q&A No.: QAH8S-023Category: InterruptsSubject: Handling of Interrupt Requests when Interrupts are MaskedQuestionI

Strona 79 - Category: DMAC

Microcomputer Technical Q&A28Q&A No.: QAH8S-024Category: InterruptsSubject: Use of IRQ Status RegisterQuestionThe IRQ status register (ISR) ca

Strona 80 - Q&A No.: QAH8S-202

Microcomputer Technical Q&A29Q&A No.: QAH8S-025Category: InterruptsSubject: Interrupt Disable Timing (1)QuestionWhen a supporting module inter

Strona 81 - Q&A No.: QAH8S-203

Microcomputer Technical Q&A30Q&A No.: QAH8S-026Category: InterruptsSubject: Interrupt Disable Timing (2)QuestionWhen an interrupt enable bit i

Strona 82 - Q&A No.: QAH8S-204

Microcomputer Technical Q&A31Q&A No.: QAH8S-027Category: InterruptsSubject: Interrupt Immediately after ResetQuestionIs an interrupt ever gene

Strona 83

Using this Application NoteThis Application Note is a compilation of responses to queries from Hitachi microcomputer users,presented in Question and A

Strona 84 - Function

Microcomputer Technical Q&A32Q&A No.: QAH8S-028Category: InterruptsSubject: Simultaneous IRQ Interrupts of the Same PriorityQuestions1. With e

Strona 85

Microcomputer Technical Q&A33Q&A No.: QAH8S-029Category: InterruptsSubject: Use of Different Interrupt ModesQuestionThere are four interrupt c

Strona 86 - Q&A No.: QAH8S-206

Microcomputer Technical Q&A34Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 87 - Q&A No.: QAH8S-207

Microcomputer Technical Q&A35Q&A No.: QAH8S-030Category: InterruptsSubject: Insufficient Number of External InterruptsQuestionCan any substitu

Strona 88 - Q&A No.: QAH8S-208

Microcomputer Technical Q&A36Q&A No.: QAH8S-031Category: Bus ControllerSubject: CS State in On-Chip RAM and Internal I/O AccessQuestionIs the

Strona 89

Microcomputer Technical Q&A37Q&A No.: QAH8S-032Category: Bus ControllerSubject:φ Clock State when Bus is ReleasedQuestionIs the φ clock output

Strona 90 - Q&A No.: QAH8S-209

Microcomputer Technical Q&A38Q&A No.: QAH8S-033Category: Bus ControllerSubject: WAIT (1)QuestionWhen programmable waits are inserted and the p

Strona 91 - Q&A No.: QAH8S-210

Microcomputer Technical Q&A39Q&A No.: QAH8S-034Category: Bus ControllerSubject: WAIT (2)QuestionThe description of the pin wait function state

Strona 92 - Q&A No.: QAH8S-211

Microcomputer Technical Q&A40Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 93

Microcomputer Technical Q&A41Q&A No.: QAH8S-035Category: Bus ControllerSubject: Program Wait Switchover TimingQuestionAfter a power-on reset,

Strona 94 - Subject: DREQ Signal Input

iContentsCPUCPUSubject: Use of General Registers... 1Subj

Strona 95 - Subject: Nature of DTC

Microcomputer Technical Q&A42Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 96 - Q&A No.: QAH8S-214

Microcomputer Technical Q&A43Q&A No.: QAH8S-036Category: Bus ControllerSubject: BREQ Acceptance in Power-Down ModesQuestions1. Is BREQ accepte

Strona 97 - Q&A No.: QAH8S-215

Microcomputer Technical Q&A44Q&A No.: QAH8S-037Category: Bus ControllerSubject: External Connection of RAM to 8-Bit-Access SpaceQuestionWhen R

Strona 98 - Q&A No.: QAH8S-216

Microcomputer Technical Q&A45Q&A No.: QAH8S-038Category: Bus ControllerSubject: Bus Controller Settings for Area 7QuestionArea 7 includes a mi

Strona 99 - Q&A No.: QAH8S-217

Microcomputer Technical Q&A46Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 Yes H

Strona 100 - Category: TPU

Microcomputer Technical Q&A47Q&A No.: QAH8S-039Category: Bus ControllerSubject: External Bus states during CPU OperationQuestions1. What is th

Strona 101 - Subject: Cascaded Connection

Microcomputer Technical Q&A48Q&A No.: QAH8S-040Category: Bus ControllerSubject: Internal I/O Register Access when Bus is ReleasedQuestionWhen

Strona 102 - Q&A No.: QAH8S-220

Microcomputer Technical Q&A49Q&A No.: QAH8S-041Category: Bus ControllerSubject: CS Signals after Power-On ResetQuestionWhat is the state of th

Strona 103 - Q&A No.: QAH8S-221

Microcomputer Technical Q&A50Q&A No.: QAH8S-042Category: Bus ControllerSubject: Bus Release Wait Time after BREQ InputQuestionIn what circumst

Strona 104 - Q&A No.: QAH8S-222

Microcomputer Technical Q&A51Q&A No.: QAH8S-043Category: Bus ControllerSubject: External Bus Right Release and Refresh ControlQuestionAre refr

Strona 105 - Subject: Two-Phase PWM Output

iiSubject: Use of Different Interrupt Modes... 33Subject: Insufficient

Strona 106 - Applicable Products

Microcomputer Technical Q&A52Q&A No.: QAH8S-044Category: Bus ControllerSubject: 2-CAS DRAM InterfaceQuestionPlease explain the use of the LCAS

Strona 107 - Category: WDT

Microcomputer Technical Q&A53Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 H8S/2

Strona 108 - Subject: SCI Initialization

Microcomputer Technical Q&A54Q&A No.: QAH8S-045Category: Power-Down StateSubject: Medium-Speed ModeQuestionWhy is it that, in medium-speed mod

Strona 109 - Q&A No.: QAH8S-226

Microcomputer Technical Q&A55Q&A No.: QAH8S-046Category: Power-Down StateSubject: Oscillation Settling Wait Time after Software Standby ModeQu

Strona 110 - Q&A No.: QAH8S-227

Microcomputer Technical Q&A56Q&A No.: QAH8S-047Category: Power-Down StateSubject: On-Chip Supporting Modules in Software Standby ModeQuestionW

Strona 111 - Q&A No.: QAH8S-228

Microcomputer Technical Q&A57Q&A No.: QAH8S-048Category: Power-Down StateSubject: Mode Pins (MD2 to MD0) in Hardware Standby ModeQuestionHow d

Strona 112 - Q&A No.: QAH8S-229

Microcomputer Technical Q&A58Q&A No.: QAH8S-049Category: Power-Down StateSubject: Hardware Standby Mode at Power-OnQuestionHow can hardware st

Strona 113 - Q&A No.: QAH8S-230

Microcomputer Technical Q&A59Q&A No.: QAH8S-050Category: Power-Down StateSubject: Module Stop ModeQuestionWhen a write is performed on an 8-bi

Strona 114 - Q&A No.: QAH8S-231

Microcomputer Technical Q&A60Q&A No.: QAH8S-051Category: Power-Down StateSubject: Timer Output in Module Stop ModeQuestionIf module stop mode

Strona 115

Microcomputer Technical Q&A61Q&A No.: QAH8S-052Category: Electrical CharacteristicsSubject: Current Dissipation ValueQuestionIn the current di

Strona 116

iiiOn-Chip I/ODMACSubject: Number of States between Transfers... 71Subject:

Strona 117 - Q&A No.: QAH8S-232

Microcomputer Technical Q&A62Q&A No.: QAH8S-053Category: Electrical CharacteristicsSubject: RD Signal TimingQuestionWith successive read cycle

Strona 118 - Subject: RDRF Flag Set Timing

Microcomputer Technical Q&A63Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 119

Microcomputer Technical Q&A64Q&A No.: QAH8S-054Category: PinsSubject: Handling of Unused PinsQuestionHow should unused pins be handled?AnswerF

Strona 120 - In Synchronous Mode

Microcomputer Technical Q&A65Q&A No.: QAH8S-055Category: PinsSubject: RES Pin, STBY Pin, and NMI Pin Input CircuitsQuestionWhat kind of circui

Strona 121 - Q&A No.: QAH8S-234

Microcomputer Technical Q&A66Q&A No.: QAH8S-056Category: PinsSubject: Address Pin States in On-Chip Memory AccessQuestionWhen on-chip ROM or o

Strona 122 - External Clock

Microcomputer Technical Q&A67Applicable ProductsApplicability Series Applicability Series Applicability SeriesYes Entire H8S Series H8S/2655 H8S/2

Strona 123 - Q&A No.: QAH8S-236

Microcomputer Technical Q&A68Q&A No.: QAH8S-057Category: PinsSubject: Built-In MOS Pull-Ups in ResetQuestionCan built-in MOS pull-ups be turne

Strona 124 - Q&A No.: QAH8S-237

Microcomputer Technical Q&A69Q&A No.: QAH8S-058Category: PinsSubject: WDTOVF PinQuestions1. What is the state of the WDTOVF pin in hardware st

Strona 125 - Q&A No.: QAH8S-238

Microcomputer Technical Q&A70Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 Yes H

Strona 126 - Q&A No.: QAH8S-239

Microcomputer Technical Q&A71Q&A No.: QAH8S-201Category: DMACSubject: Number of States between TransfersQuestionA minimum of two states are ne

Strona 127

ivSubject: RDRF Flag Set Timing ... 110Subject: Interru

Strona 128

Microcomputer Technical Q&A72Q&A No.: QAH8S-202Category: DMACSubject: Maximum Transfer RateQuestionWhat is the maximum transfer rate for singl

Strona 129 - Subject: Data Transfer to TDR

Microcomputer Technical Q&A73Q&A No.: QAH8S-203Category: DMACSubject: Difference between DMAC and DTCQuestionWhat is the difference between th

Strona 130

Microcomputer Technical Q&A74Q&A No.: QAH8S-204Category: DMACSubject: Alternate 8-Bit/16-Bit Space AccessesQuestionCan data transfer be perfor

Strona 131 - Subject: TDRE Flag Set Timing

Microcomputer Technical Q&A75Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 Yes H

Strona 132

Microcomputer Technical Q&A76Q&A No.: QAH8S-205Category: DMACSubject: TEND Signal Output Conditions when Using Write BufferFunctionQuestionWha

Strona 133

Microcomputer Technical Q&A77Internal addressExternal addressCPU external writeCPU external writeDMAC transferDMAC transferφLow in read/write cycl

Strona 134 - 2. Synchronous mode

Microcomputer Technical Q&A78Q&A No.: QAH8S-206Category: DMACSubject: Interrupt Acceptance After End of TransferQuestionAfter the transfer cou

Strona 135 - Q&A No.: QAH8S-242

Microcomputer Technical Q&A79Q&A No.: QAH8S-207Category: DMACSubject: Handling of Transfer Request before Start of TransferQuestionIf a transf

Strona 136 - Category: A/D Converter

Microcomputer Technical Q&A80Q&A No.: QAH8S-208Category: DMACSubject: Activation Request Signal DetectionQuestionWhen the DREQ pin is designat

Strona 137

Microcomputer Technical Q&A81Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 Yes H

Strona 138 - Q&A No.: QAH8S-244

1Microcomputer Technical Q&AQ&A No.: QAH8S-001Category: CPUSubject: Use of General RegistersQuestionIs it possible to use a mix of 8-bit, 16-b

Strona 139

Microcomputer Technical Q&A82Q&A No.: QAH8S-209Category: DMACSubject: Short Address Mode and Full Address ModeQuestionWhat is the difference b

Strona 140 - Q&A No.: QAH8S-245

Microcomputer Technical Q&A83Q&A No.: QAH8S-210Category: DMACSubject: Bus Right in Standby StateQuestionIn the DMAC full address mode and exte

Strona 141

Microcomputer Technical Q&A84Q&A No.: QAH8S-211Category: DMACSubject: Handling of Transfer End InterruptQuestionsThe manual states that if DTE

Strona 142 - Category: I/O Ports

Microcomputer Technical Q&A85Applicable ProductsApplicability Series Applicability Series Applicability SeriesEntire H8S Series Yes H8S/2655 Yes H

Strona 143 - Subject: Reserved Bits

Microcomputer Technical Q&A86Q&A No.: QAH8S-212Category: DMACSubject: DREQ Signal InputQuestionWhen the DREQ pin is used in level-sensing mode

Strona 144 - Subject: Disabling

Microcomputer Technical Q&A87Q&A No.: QAH8S-213Category: DTCSubject: Nature of DTCQuestionIs the DTC special hardware, or is the DTC function

Strona 145 - Q&A No.: QAH8S-249

Microcomputer Technical Q&A88Q&A No.: QAH8S-214Category: DTCSubject: Maximum Number of ChannelsQuestionWhat is the maximum number of DTC chann

Strona 146 - Q&A No.: QAH8S-250

Microcomputer Technical Q&A89Q&A No.: QAH8S-215Category: DTCSubject: Setting Register InformationQuestionAre any precautions necessary when se

Strona 147 - Q&A No.: QAH8S-251

Microcomputer Technical Q&A90Q&A No.: QAH8S-216Category: DTCSubject: Order of Setting Register InformationQuestionIs there a particular order

Strona 148

Microcomputer Technical Q&A91Q&A No.: QAH8S-217Category: DTCSubject: Use of DTC Interrupt Select Bit (DISEL)QuestionHow is the DISEL bit in DT

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