Renesas MN4 Instrukcja Użytkownika Pobierz pdf (Strona 38)

V850E2/MN4 Timer Array Unit Control

R01AN0922EJ0100 Rev.1.00 Page 38 of 54

Jan 13, 2012

4.4.8 TAUJn Control Registers

• TAUJn channel data register (TAUJnCDRm)

This register functions either as a compare register or as a capture register, depending on the operation mode specified

in TAUJnCMORm.TAUJnMD[4:1].

In this sample program, the TAUJ0TTIN0 signal width is estimated by a combination of the values of TAUJ0CDR0 and

TAUJ0CSR0.TAUJnOVF.

Figure 4.33 TAUJnCDRm Register Format

Setting example

pulse_width = (overflow_flag * (0xffffffff + 1)) + TAUJ0CDR0 + 1;

/* calculate the width of input pulse */

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 56 57

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Renesas MN4 Instrukcja Użytkownika Strona 38