Renesas M32R-FPU Instrukcja Użytkownika Pobierz pdf (Strona 26)

M32R Debugger and Trace 26 Security Levels of the M32R Family

General Restrictions and Hints

System.Up duration System.Up takes 1 … 2 s caused by the target CPU.

If a new trace port width is selected (4->8 or 8->4), next

SYS.UP command takes a bit longer due to probe CPLD

reprogramming.

ASM debugging in hardware

loops - stepping

The debugger tries to step over delay slots. If the debugger is

not successful, set a software breakpoint after the hardware

loop and use go to step over the hardware loop.

HLL debugging in optimized

code

HLL debugging in optimized code is restricted. Source lines

may be assigned wrong, local variables may not be displayed.

Debugging with interrupts When IMASKHLL or IMASKASM is enabled the debugger won’t

update correctly the interrupt disable bit in the SR register in

case the code executed the DI instruction. Use

SYStem.Option.IPLDI to switch the behavior.

Ignore RESET Monitoring Normally the debugger monitors RESET and stops operation if

RESET is asserted. If one wants to disable RESET monitoring, he

has to enter

DIAG 0x3000 0xB1 1

To allow RESET monitoring again, enter

DIAG 0x3000 0xB1 0 (default after startup)

External Watchdog Timer An external WDT must normally be turned off. For the case that it

is not possible, there are 2 solutions.

1. For the case the WDT can be feed by toggling a CPU pin:

DIAG 0x3000 0xEA <pin> (Example: DIAG 0x3000 0xEA

124.)

DIAG 0x3000 0xEB <0/1> (Example DIAG: 0x3000 0xEB 1 for

on)

2. For the case the WDT must be feed by anyhow:

Refer to DATA.TIMER.SEQUENCE and similar instructions

By default external WDT support is not enabled.

1 2 ... 21 22 23 24 25 26 27 28 29 30 31 32 33 34

Brak uwag

Renesas M32R-FPU Instrukcja Użytkownika Strona 26