Renesas Emulator System M3T-MR100 Instrukcja Użytkownika Pobierz pdf (Strona 8)

REJ05B1160-0101 Rev.1.01 February 2010 Page 8 of 43

M16C/62P Group, R32C/111 Group

Differences between M16C/62P and R32C/111 (100 pin ver.)

Note:

1. There are two banks of these registers.

Table 4.4 Comparison Chart: Bit Length of Internal Registers

Internal Register

M16C/62P R32C/111

Data registers

(1)

R0, R1, R2, R3 16 bits

Registers R0 and

R1 can be

respectively divided

into upper and

lower 8-bit registers

R0, R1, R2, R3 16 bits

Registers R0, R1, R2,

and R3 can be

respectively divided

into upper and lower

8-bit registers.

Registers R2 and R0,

R3 and R1 can be

respectively merged

into one 32-bit register

R4, R5, R6, R7 16 bits

Registers R7 and R5,

R6 and R4 can be

respectively merged

into one 32-bit register

Address register

(1)

A0, A1 16 bits A0, A1, A2, A3 32 bits

Static base register SB

(1)

Frame base register

(1)

FB FB

User stack pointer USP USP

Interrupt stack pointer ISP ISP

Interrupt table register INTB 20 bits INTB 32 bits

INTBL 16 bits N/A N/A

INTBH 4 bits N/A N/A

Program counter PC 20 bits PC 32 bits

Flag register FLG 16 bits FLG 32 bits

Fast interrupt registers N/A N/A SVF 32 bits

N/A N/A SVP

N/A N/A VCT

DMAC-associated

registers

N/A N/A DMD0, DMD1,

DMD2, DMD3

32 bits

N/A N/A DCT0, DCT1,

DCT2, DCT3

24 bits

N/A N/A DCR0, DCR1,

DCR2, DCR3

N/A N/A DSA0, DSA1,

DSA2, DSA3

32 bits

N/A N/A DDA0, DDA1,

DDA2, DDA3

N/A N/A DSR0, DSR1,

DSR2, DSR3

N/A N/A DDR0, DDR1,

DDR2, DDR3

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 42 43

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