Renesas Emulation Pod M306H2T-RPD-E Informacje Techniczne Pobierz pdf (Strona 59)

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Figure 5.3 Timing requirements

Vcc=5V

(3) Timing Requirements

Table 5.4 and Figure 5.3 show the timing requirements.

Table 5.4 Timing requirements

Common to "with wait" and "no-wait" (this product)

Common to "with wait" and "no-wait" (actual MCU)

Symbol Item

Actual MCU

[ns]

This product

[ns]

Min.

See left

Max.

See left

Min.

Max.

tsu(DB-RD)

tsu(RDY-BCLK)

tsu(HOLD-BCLK)

th(RD-DB)

th(BCLK-RDY)

th(BCLK-HOLD)

td(BCLK-HLDA)

Data input setup time

RDY* input setup time

HOLD* input setup time

Data input hold time

RDY* input hold time

HOLD* input hold time

HLDA* output delay time

* Compared with the actual MCU, this product enters high-impedance state after

a 0.5 cycle delay.

1 2 ... 54 55 56 57 58 59 60 61 62 63 64 ... 75 76

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Renesas Emulation Pod M306H2T-RPD-E Informacje Techniczne Strona 59