Renesas Single-Chip Microcomputer SH7203 Informacje Techniczne Pobierz pdf (Strona 18)

Reference Function ON OFF

SW5-3 User LEDs

Port pin PC14 (CPU PIN 75) can be

used to drive LED2.

LED 2 off

SW5-4 Bus Interface Pin 75 of the CPU can be used as

WAITn input available on JA3A-49.

Pin 75 of the CPU can not be used as

WAITn input.

Table 6-20 LED2 / WAITn control

Reference Function ON OFF

SW5-5 User LEDs

Port pin PE11 (CPU PIN 72) can be

used to drive LED3.

LED3 off.

SW5-6 Bus Interface Pin 72 of the CPU can be used as

CS6n output.

Pin 72 of the CPU can not be used as

CS6n output.

Table 6-21 LED3 / CS6n

Reference Function ON OFF

SW5-7 Bus interface Pin 17 of the CPU can be used as A0

address output.

Pin 17 of the CPU can not be used as

A0 address output.

SW5-8 AUD interface

Pin 17 of the CPU can be used as

AUDSYNCn output.

Pin 17 of the CPU can not be used as

AUDSYNCn output.

Please note that only one switch can be set to ON.

Table 6-22 A0/AUDSYNCn selection

Reference Function ON OFF

SW5-9 Application

Headers

Pin 192 of the CPU (ADTRGn) is

connected to user switch SW3.

Pin 192 of the CPU (ADTRGn) is

disconnected from user switch SW3.

SW5-10 Application

Headers

Pin 192 of the CPU is connected to

EXT_ADTRG available on JA1A-8.

Pin 192 of the CPU is disconnected

from EXT_ADTRG.

Please note that SW4-10 must be off (16 Bit mode) to enable ADTRGn

Table 6-23 ADTRGn selection

Reference Function ON OFF

SW6-1 Ethernet

Pin 182 of the CPU is connected to

ETH_PME pin of Ethernet controller.

Pin 182 of the CPU is disconnected

from ETH_PME.

SW6-2 Application

Header

Pin 182 of the CPU is connected to

EXT_IRQ3n on JA1A-23.

Pin 182 of the CPU is disconnected

from EXT_IRQ3n.

Please note that only one switch can be set to ON.

Table 6-24 ETH_PME /EXT_IRQ3 select

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 32 33

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