Renesas Single-Chip Microcomputer SH7203 Informacje Techniczne

Przeglądaj online lub pobierz Informacje Techniczne dla Switche sieciowe Renesas Single-Chip Microcomputer SH7203. Renesas Single-Chip Microcomputer SH7203 Technical information Instrukcja obsługi

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To our customers,
Old Company Name in Catalogs and Other Documents
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Renesas Electronics website: http://www.renesas.com
April 1
st
, 2010
Renesas Electronics Corporation
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry
.
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Podsumowanie treści

Strona 1 - To our customers

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology C

Strona 2

Chapter 5. Block Diagram Figure 5-1 shows the CPU board components and their connectivity. MicrocontrollerUser: 4 LEDS1Green, 1Orange, 2RedApplicat

Strona 3 - User’s Manual

Chapter 6. User Circuitry 6.1. Switches There are four switches located on the CPU board. The function of each switch and its connection are shown i

Strona 4 - Table of Contents

6.4. Serial port The microcontroller serial port SCIF0 can be used for RS232 communication. Please refer to Table 6-3 for the option links related wi

Strona 5 - Chapter 1. Preface

CAN0 CAN1 Pin Circuit Net Name Device Pin Pin Circuit Net Name Device Pin 1 CTx0 86* 1 CTx1 88* 2 GROUND - 2 GROUND - 3 CRx0 85* 3 CRx1

Strona 6 - Chapter 2. Purpose

panel. It is possible to connect the LCDC to the LCD module other than microcomputer bus interface types and NTSC/PAL types and those that apply the

Strona 7 - Chapter 3. Power Supply

J14 (For Generic LCD) Pin CPU board Signal Name Device Pin Pin CPU board Signal Name Device Pin 1 BOARD_5V --- 2 BOARD_5V --- 3 LCD_VCC ---

Strona 8 - Chapter 4. Board Layout

For more details on SH7203 on-chip Serial Sound Interface module, please refer to SH7203 Group Hardware Manual. 6.11. Option Links Table 6-10 to Tabl

Strona 9 - 4.2. Board Dimensions

Reference Function ON OFF SW4-4 USB VBUS (pin 102) of the CPU monitors Host VBUS. HOST_VBUS_FLAG is disconnected from VBUS (pin 102) of the CPU.

Strona 10 - Chapter 5. Block Diagram

Reference Function ON OFF SW5-3 User LEDs Port pin PC14 (CPU PIN 75) can be used to drive LED2. LED 2 off SW5-4 Bus Interface Pin 75 of the CPU

Strona 11 - Chapter 6. User Circuitry

Reference Function ON OFF SW6-3 User Switches Pin 181 of the CPU is connected to User switch SW3. Pin 181 of the CPU is connected to User switch

Strona 12 - 6.6. RCAN

Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to chang

Strona 13 - 6.9. LCD Interface

Reference Function ON OFF SW7-5 Application Header Pin 211 of the CPU is connected to TMR1 on JA2A-20. Pin 211 of the CPU is disconnected from TM

Strona 14

6.13.Oscillator Sources A crystal oscillator is fitted on the CPU board and used to supply various clock inputs to the Renesas microcontroller. Table

Strona 15 - 6.10. SSI

Chapter 7. Modes This CPU board supports four clock modes. Please refer to Table 7-1 for clock mode selection. SW4-9 (CPU Pin 96, MD_CLK1) SW4-8 (C

Strona 16 - 6.12. DIP Switch Settings

Chapter 8. Programming Methods The RSK+SH7203 board can be programmed using E10A-lite supplied with the kit. Following headers are provided to downl

Strona 17

Chapter 9. Headers 9.1. Application Headers Table 9-1 to below show the standard application header connections. Table 9-5Note: Switch ID is spe

Strona 18

15 Vp MO_Vp** 195 16 Vn MO_Vn** 197 17 Wp MO_Wp** 202 18 Wn MO_Wn** 203 19 TMR0 TMR0** 51 (SW7-7) 20 TMR1 TMR1** 211 (SW7-5) 21 TRIGa

Strona 19

JA5A and JA5B Pin Header Name CPU board Signal Name Device Pin Pin Header Name CPU board Signal Name Device Pin 1 AD4 AN4 115 2 AD5 AN5 11

Strona 20

Chapter 10. Code Development 10.1. Overview Note: For all code debugging using Renesas software tools, the CPU board must be connected to a PC USB p

Strona 21 - 6.14. Reset Circuit

10.4. Memory Map The memory map shown in this section visually describes the memory areas of RSK+SH7203. Figure 10-1: Memory Map 24

Strona 22 - Chapter 7. Modes

Chapter 11. Component Placement Figure 11-1: Component Placement (Top Layer)25

Strona 23 - 8.2. AUD Header for E10A

Renesas Starter Kit+ for SH7203User’s ManualUser’s ManualRev.2.00 2008.01RENESAS SINGLE-CHIP MICROCOMPUTERSuperH™RISC engine

Strona 24 - Chapter 9. Headers

Figure 11-2: Component Placement (Bottom Layer) 26

Strona 25

Chapter 12. Additional Information For details on how to use High-performance Embedded Workshop (HEW), refer to the HEW manual available on the CD o

Strona 26

Renesas Starter Kit+ for SH7203 User's Manual Publication Date Rev.2.00 17.Jan.2008 Published by: Renesas Tec

Strona 27 - 10.3. Breakpoint Support

1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 JapanRenesas Starter Kit+ for SH7203REG10J0060-0200User’s Manual

Strona 28 - 10.4. Memory Map

Table of Contents Chapter 1. Preface...

Strona 29

Chapter 1. Preface Cautions This document may be, wholly or partially, subject to change without notice. All rights reserved. No one is permitted t

Strona 30

Chapter 2. Purpose This RSK+ is an evaluation tool for Renesas microcontrollers. Features include: • Renesas Microcontroller Programming. • User

Strona 31

Chapter 3. Power Supply 3.1. Requirements This CPU board can operate from either a 5V power supply or an 8V to 15V supply. Please refer to the foll

Strona 32

Chapter 4. Board Layout 4.1. Component Layout The following diagram shows top layer component layout of the board. Figure 4-1: Board Layout 4

Strona 33

4.2. Board Dimensions The following diagram gives the board dimensions and connector positions. All through hole connectors are on a common 0.1” grid

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