Renesas PROM Programming Adapters PCA7438F-64A Dokumentacja Pobierz pdf (Strona 32)

Rev.2.40 Jun 14, 2004 page 32 of 56

38C1 Group

Fig. 31 Example of circuit at each bias

Table 8. Bias control and applied voltage to VL1–VL3

Bias value

1/3 bias

1/2 bias

1/1 bias

(static)

Voltage value

VL3=VLCD

VL2=2/3 VLCD

VL1=1/3 VLCD

VL3=VLCD

VL2=VL1=1/2 VLCD

VL3=VLCD

VL2=VL1=1/2 VSS

Note : VLCD is the maximum value of supplied voltage for the

LCD panel.

Bias Control and Applied Voltage to LCD

Power Input Pins

To the LCD power input pins (VL1–VL3), apply the voltage shown

in Table 8 according to the bias value.

Select a bias value by the bias control bit (bit 2 of the LCD mode

Common Pin and Duty Ratio Control

The common pins (COM0–COM3) to be used are determined by

duty ratio.

Select duty ratio by the duty ratio selection bits (bits 0 and 1 of the

LCD mode register).

When the LCD enable bit is “0”, the output of COM0–COM3 is “L”

level.

Table 9. Duty ratio control and common pins used

Duty

ratio

Common pins used

Notes 1: Set COM1, COM2 and COM3 to be open.

2: Set COM2 and COM3 to be open.

3: Set COM3 to be open.

Bit 1

Bit 0

COM0 (Note 1)

COM0, COM1 (Note 2)

COM0–COM2 (Note 3)

COM0–COM3

Duty ratio selection bits

R4 = R5

VL2

VL1

VL3

1/3 bias 1/1 bias (static)

Contrast control

1 2 ... 27 28 29 30 31 32 33 34 35 36 37 ... 58 59

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Renesas PROM Programming Adapters PCA7438F-64A Dokumentacja Strona 32

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