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Strona 1 - H8S and H8/300H

21-018FOctober 1999H8S and H8/300H16-Bit Microcontrollers

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case of H8/300H clock gearingeffects the entire chip,so reductionwill be almost proportional,in case ofH8S clock gearing effects only busmasters (CPU,

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9required. Hence,very low averagepower consumption can be achieved,even with a real time clock beingimplemented in software.• If no activity is requir

Strona 4 - Welcome To

10Trap instructionexceptions (TRAPA)These exceptions start when a TRAPAinstruction is executed in programexecution state. The TRAPA instructionhas fou

Strona 5 - Figure 2

11MemoryFLASHA traditional strength of Hitachi’smicrocontrollers are the large integratedmemories and the advanced memorytechnology.Already for many y

Strona 6 - H8/300H Roadmap

12As one of the key reasons for using theH8S and H8/300H is the 16MByteslinear address space, it will often be usedin a system with a large amount ofe

Strona 7 - MAC on H8S/26xx only

13Improved readaccess timingIn order to give external devices amaximum of time to drive the requireddata onto the bus,the read access edgethat latches

Strona 8 - 0 1 0 0 0 0 0

14Direct Memory AccessController (DMAC) In a system with a high performanceCPU and with large memory, a DirectMemory Access Controller willsignificantl

Strona 9 - Addressing

15Data Transfer Controller (DTC)Analysis of many applications that use aDMAC has shown that a substantial partof these applications do not require the

Strona 10 - Low Power

16TimerOne of the most important peripheralson any microcontroller is the timer unit.Timers have many uses in electronicsystems. They trigger the tas

Strona 11 - Figure 9

17• Timer SynchronisationTo allow timer channels in the ITUto be used in synchronisation, it ispossible to set up two or more timersso that they are s

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18Modified ITU onH8/306x, H8/3006and H8/3007The ITU on H8/306x,H8/3006 andH8/3007 are modified to be moreflexible. Channels 3 and 4 can be splitinto 4 t

Strona 14 - Bus State Controller (BSC)

19“mishap’in the system (such as a noiseinduced software crash) is rectified asquickly as possible.The principle behind a watchdog timeris very simple

Strona 15 - Figure 12

20between new patterns being output toallow acceleration and deceleration of themotor as shown by the velocity profile.When the TPC,ITU and DMAC arewor

Strona 16 - Controller (DMAC)

21Serial Communications Interface (SCI)20MHz for H8/300H and over 4Mbit/sat 25MHz for H8S.The H8S and the H8/300H serial portsalso support multiproces

Strona 17 - Read Write Read Write

22Memory Type and SizeH ROM-LESS or pseudo ROM-LESS(*) H Mask-ROM H OTP and Mask H Flash and Mask (H8S/2623,33 Flash only)(UD) Under Development

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H8/3001 H8/3002 H8/3003 H8/3004,5 H8/3006,7 H8/3020,1,2 (UD)-----128,192,256k512 512 512 2,4k 2,4k 4,4,8k-----HD64F30224.5-5.5/16 4.5-5.5/16 4.5-5.5/1

Strona 19 - Counting up Counting down

H8/3030,1,2 H8/3033,4,5 H8/3036,7,8,9 H8/3040,1,2 H8/3044,5,7,8 H8/3052 (UD) H8/3060,1,2 H8/3065,6,7 H8S/2120,2,3,4,6,7,8**16,32,64k 128,192,256k 16,3

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H8S/2130,2,3,4,7,8** H8S/2142,3,4,7,8** H8S/2223,5,7 H8S/2233,5,7 H8S/2238 H8S/2240,1,2,3,4,5,6 H8S/2310,2 H8S/2322,3,7,8 H8S/2340,1,3,5 H8Sk 32,64,96

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S/2350,1 H8S/2353,5 H8S/2352,7 H8S/2623, H8S/2626 H8S/2633** H8S/2653,50,64k 64,128k 0,128k 256k 256k 64,128k2k 2,4k 8k 12k 16k 4k- HD6472355 HD647235

Strona 22 - Acceleration Deceleration

27In BriefH8S & CAN derivativesIn this brochure an overview is given asto why H8S and H8/300H give you thetechnical benefits that are demanded byto

Strona 23 - H8/300H H8S H8S/21xx

1INDEXNotes1. This document may,wholly or partially,be subject to change without notice.2. All rights are reserved: No one is permitted to reproduce

Strona 24 - Memory Type and Size

28Smart card interface mode (SIM)In this mode the SCI conforms to a sub-set ISO7816-3. This standard is used tocommunicate with so called smart cards,

Strona 25 - H8S and H8/300H Selector

29Analogue to Digital Converter (ADC)In many microcontroller based systems,some way of measuring analogueelectrical values is necessary. With this inm

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Controller Area Network CAN30The HCAN module (Hitachi CAN)*complies to version 2.0B (Full CAN) asdefined by Bosch.Additionally, anindependent institute

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31H8/3039P77/AN7P76/AN6P75/AN5P74/AN4P73/AN3P72/AN2P71/AN1P70/AN0AVCCAVSSPA7/TP7/TIOCB2/A20PA6/TP6/TIOCA2/A21PA5/TP5/TIOCB1/A22PA4/TP4/TIOCA1/A23PA3/T

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H8S/2000 CPUWDT0, WDT1ROMRAMP17/A7P16/A6P15/A5P14/A4P13/A3P12/A2P11/A1P10/A0P27/A15P26/A14P25/A13P24/A12P23/A11P22/A10P21/A9P20/A8PA7/A23/KIN15/CIN15P

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PE7/D7PE6/D6PE5/D5PE4/D4PE3/D3PE2/D2PE1/D1PE0/D0Internal data busPD7/D15PD6/D14PD5/D13PD4/D12PD3/D11PD2/D10PD1/D9PD0/D8CVCCVCCVSSVSSPA3/A19/SCK2PA2/A1

Strona 30 - Figure 20

PE7/D7PE6/D6PE5/D5PE4/D4PE3/D3PE2/D2PE1/D1PE0/D0PD7/D15PD6/D14PD5/D13PD4/D12PD3/D11PD2/D10PD1/D9PD0/D8Port DVCCVCCVCCVSSVSSVSSVSSVSSVSSPC7/A7PC6/A6PC5

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PE7/D7PE6/D6PE5/D5PE4/D4PE3/D3PE2/D2PE1/D1PE0/D0PD7/D15PD6/D14PD5/D13PD4/D12PD3/D11PD2/D10PD1/D9PD0/D8Port DVCCVCCVCCVCCVCCVSSVSSVSSVSSVSSVSSVSSVSSPor

Strona 32 - Peripheral data bus

Internal data busPeripheral data busPeripheral address busPD7/D15PD6/D14PD5/D13PD4/D12PD3/D11PD2/D10PD1/D9PD0/D8Port DPE7/D7PE6/D6PE5/D5PE4/D4PE3/D3PE

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37Ordering InformationThe following tables show the available derivatives for each series within the H8/300H and H8S families.To build the actual part

Strona 34 - H8S/2134

2Welcome Tocustomers, H8/300H is an excellentexample where this policy has workedfor our customers and Hitachi.In continuation of this policy H8S isHi

Strona 35 - H8S/2238

38H8/3048 (OTP)Body Package suffix Package/Voltage/Temp. available clockHD6473048S F FP-100B/5V 16TF TFP-100B/5V 16VF FP-100B/low 8,13VTF TFP-100B/low

Strona 36 - H8S/2245

39H8S/2355 (OTP)Body Package/clock suffix Package/Voltage/Temp.HD6472355 F20 FP-128/5VTE20 TFP-120/5VF10 FP-128/lowTE10 TFP-120/lowF20I FP-128/5V/-40°

Strona 37 - H8S/2357

40Ordering Information and PackagesNaming rule forH8/300H mask ROMpartsHD643 + device body+ revision +code/speed + ROM code + package+ temperaturedevi

Strona 38 - 2. The FWE pin is used only

41Packages0.13 M0° – 10°0.32 ± 0.080.17 ± 0.053.10 Max1.2 ± 0.224.8 ± 0.4 20 805150313011008118.8 ± 0.4 140.150.652.702.40.20+0.10–0.200.58 0.830.30 ±

Strona 39 - Ordering Information

4216.0 ± 0.2140.070.100.5 ± 0.116.0 ± 0.20.40.10 ± 0.101.20 Max0.17 ± 0.050° – 8°90 61130911203160M0.17 ± 0.051.01.001.20.15 ± 0.040.15 ± 0.04Unit: mm

Strona 40 - Information

43Tools*• evaluation board in a metal case (CEmarked), containing H8/H8Smicrocontroller, external SRAM, 2serial ports, LED’s, RESET and NMIpush button

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H8/300H H8/3001 FP-80A1 PHB300HQ80A1TFP-80C1 PHB300HT80C1H8/3030,1,2,3,4,5 FP-80A2 PHB300HQ80A2TFP-80C2 PHB300HT80C2H8/3004,5 FP-80A3 PHB300HQ80A3TFP-

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45MakeAppMakeApp is a visual development tool,which automatically creates device dri-vers for all the on-chip peripherals. Itprovides a point and clic

Strona 43 - Packages

46Third PartyOperating SystemsThird party operating systems that sup-port H8/300H and H8S are availablefrom ATI and TECSI. Both companiesoffer modern

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47Related Literature /Internet / CD-ROMShortforms for Hitachi Microcontroller Literature no.‘H8/300 & H8/300L’ 21-017Hitachi’s single chip,low pow

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3The European electronics industrydemands full service and support.Hitachi,responded by setting up aEuropean engineering and tool designsubsidiary 12

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Application Notes No. DMA request and Transfer time on H8/300H Apps/012/1.0Interfacing various bit-size DRAMS to the H8/300H Apps/013/1.0Add. the da

Strona 48 - Third Party

http://www.hitachi-eu.com/hel/ecg/Hitachi Europe LtdElectronic Components Group(Northern Europe)Headquarters:Whitebrook Park, Lower Cookham Road,Maide

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4Performance/ Memory/ IntegrationPerformance/ Memory/ IntegrationH8S+CAN (F)*512Byte RAM80, 100, 112 pin16MHz at 5VH8/3001, 2, 3 series2K RAM80, 100 p

Strona 50 - Application Notes No

5CPUAll H8 share a common CPUarchitecture, a general purpose registerarchitecture that allows efficientexecution of software written in C andproduces d

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6Instruction SetH8/300H has an instruction set whichsuits the combined needs of HLLprogramming and embedded applications.It comprises of 62 instructio

Strona 52 - The vital component

7AddressingTo support large memory systems,thelinear address space of the H8/300H andthe H8S CPU core allows direct accessto every address in the whol

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