Renesas PROM Programming Adapter PCA7447FP Informacje Techniczne Strona 27

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24
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C8 Group
SERIAL I/O
Serial I/O can be used as either clock synchronous or asynchronous
(UART) serial I/O. A dedicated timer (baud rate generator) is also
provided for baud rate generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O can be selected by setting the mode
selection bit of the serial I/O control register to 1.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is started
by a write signal to the transmit/receive buffer registers.
Fig. 20 Block diagram of clock synchronous serial I/O
Fig. 21 Operation of clock synchronous serial I/O function
P
4
6
/
S
CLK
P
4
7
/
S
R
D
Y
P
4
4
/
R
X
D
P
4
5
/
T
X
D
f
(
X
I
N
)
1/4
1/4
F
/
F
S
e
r
i
a
l
I
/
O
s
t
a
t
u
s
r
e
g
i
s
t
e
r
Serial I/O control register
R
e
c
e
i
v
e
b
u
f
f
e
r
r
e
g
i
s
t
e
r
A
d
d
r
e
s
s
0
0
1
8
1
6
R
e
c
e
i
v
e
s
h
i
f
t
r
e
g
i
s
t
e
r
R
ece
i
ve
b
u
ff
er
f
u
ll
fl
ag
(RBF)
R
e
c
e
i
v
e
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
(
R
I
)
C
l
o
c
k
c
o
n
t
r
o
l
c
i
r
c
u
i
t
Shif
t c
l
oc
k
S
e
r
i
a
l
I
/
O
c
l
o
c
k
s
e
l
e
c
t
i
o
n
b
i
t
F
r
e
q
u
e
n
c
y
d
i
v
i
s
i
o
n
r
a
t
i
o
1
/
(
n
+
1
)
B
a
u
d
r
a
t
e
g
e
n
e
r
a
t
o
r
Add
ress 001
C
16
B
R
G
c
o
u
n
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
Clock control circuit
F
a
l
l
i
n
g
-
e
d
g
e
d
e
t
e
c
t
o
r
D
ata
b
us
Add
ress 0018
16
S
h
i
f
t
c
l
o
c
k
T
r
a
n
s
m
i
t
s
h
i
f
t
r
e
g
i
s
t
e
r
s
h
i
f
t
c
o
m
p
l
e
t
i
o
n
f
l
a
g
(
T
S
C
)
T
ransm
i
t
b
u
ff
er empty
fl
ag
(TBE)
T
ransm
i
t
i
nterrupt request
(TI)
T
ransm
i
t
i
nterrupt source se
l
ect
i
on
bi
t
A
d
d
r
e
s
s
0
0
1
9
1
6
D
ata
b
us
Add
ress 001
A
16
Transmit buffer register
Transmit shift register
(
f
(
X
C
I
N
)
i
n
l
o
w
-
s
p
e
e
d
m
o
d
e
)
R
e
c
e
i
v
e
e
n
a
b
l
e
s
i
g
n
a
l
S
R
D
Y
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
R
B
F
=
1
T
S
C
=
1
T
B
E
=
0
T
B
E
=
1
T
S
C
=
0
T
r
a
n
s
m
i
t
/
r
e
c
e
i
v
e
s
h
i
f
t
c
l
o
c
k
(
1
/
2
t
o
1
/
2
0
4
8
o
f
i
n
t
e
r
n
a
l
c
l
o
c
k
,
o
r
a
n
e
x
t
e
r
n
a
l
c
l
o
c
k
)
S
er
i
a
l
output
T
X
D
S
er
i
a
l
i
nput
R
X
D
W
r
i
t
e
s
i
g
n
a
l
t
o
r
e
c
e
i
v
e
/
t
r
a
n
s
m
i
t
b
u
f
f
e
r
r
e
g
i
s
t
e
r
(
a
d
d
r
e
s
s
0
0
1
8
1
6
)
O
verrun error
(OE)
detection
N
otes 1:
Th
e transm
i
t
i
nterrupt
(TI)
can
b
e se
l
ecte
d
to occur e
i
t
h
er w
h
en t
h
e transm
i
t
b
u
ff
er reg
i
ster
h
as empt
i
e
d
(TBE
=1
)
or a
f
ter
the transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the serial
I/O control register.
2: If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data
is output continuously from the T
X
D pin.
3: The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes 1 .
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
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