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V850E2/MN4 CSIH Control

R01AN0924EJ0100 Rev.1.00 Page 20 of 40

Feb 10, 2012

Figure 4.9 CSIHnCTL0 Register Format (2/2)

CSIHnCTL0 = 0x00; /* stop CSIH0 */

CSIHnPWR = 1; /* permit CSIHn */

CSIHnTXE = 1; /* permit transmission */

CSIHnRXE = 1; /* permit reception */

CSIHnMBS = 0; /* memory mode */

CSIHnMBS = 1; /* direct access mode */

CSIHnJOBE = 1; /* stop communication after this JOB */

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Renesas MN4 Dokumentacja Strona 20