R8C/10 Group 8. Processor Mode
Rev.1.20 Jan 27, 2006 page 31 of 180
REJ09B0019-0120
8. Processor Mode
8.1 Types of Processor Mode
The processor mode is single-chip mode. Table 8.1 shows the features of the processor mode. Figure 8.1
shows the PM0 and PM1 register.
Processor mode register 0
(1)
S
y
m
b
o
lA
d
d
r
e
s
sA
f
t
e
r
r
e
s
e
t
P
M
00
0
0
4
1
6
0
0
1
6
B
i
t
n
a
m
e FunctionBit symbol
R
b
7b
6b
5b
b
3b
2b
1b
0
PM03
(
b
1
-
b
0
)
R
e
s
e
r
v
e
d
b
i
t
Software reset bit
Setting this bit to “1” resets the
microcomputer. When read, its
content is “0”.
R
R
M
u
s
t
s
e
t
t
o
“
0
”
N
O
T
E
S
:
1
.
S
e
t
t
h
e
P
R
C
1
b
i
t
i
n
t
h
e
P
R
C
R
r
e
g
i
s
t
e
r
t
o
"
1
"
(
w
r
i
t
e
e
n
a
b
l
e
)
b
e
f
o
r
e
w
r
i
t
i
n
g
t
o
t
h
i
s
r
e
g
i
s
t
e
r
.
N
o
t
h
i
n
g
i
s
a
s
s
i
g
n
e
d
.
W
h
e
n
w
r
i
t
e
,
s
e
t
t
o
“
0
”
.
W
h
e
n
r
e
a
d
,
i
t
s
c
o
n
t
e
n
t
i
s
i
n
d
e
t
e
r
m
i
n
a
t
e
.
00
(b2)
N
o
t
h
i
n
g
i
s
a
s
s
i
g
n
e
d
.
W
h
e
n
w
r
i
t
e
,
s
e
t
t
o
“
0
”
.
W
h
e
n
r
e
a
d
,
i
t
s
c
o
n
t
e
n
t
i
s
0
.
(
b
7
-
b
4
)
0
Figure 8.1 PM0 Register and PM1 Register
Table 8.1 Features of Processor Mode
Processor mode register 1
(1)
S
y
m
b
o
lA
d
d
r
e
s
sA
f
t
e
r
r
e
s
e
t
P
M
10
0
0
5
1
6
0
0
1
6
B
i
t
n
a
m
e FunctionBit symbol
R
W
b
7b
6b
b
4b
3b
b
1b
0
RW
N
O
T
E
S
:
1
.
S
e
t
t
h
e
P
R
C
1
b
i
t
i
n
t
h
e
P
R
C
R
r
e
g
i
s
t
e
r
t
o
"
1
"
(
w
r
i
t
e
e
n
a
b
l
e
)
b
e
f
o
r
e
w
r
i
t
i
n
g
t
o
t
h
i
s
r
e
g
i
s
t
e
r
.
2
.
P
M
1
2
b
i
t
i
s
s
e
t
t
o
“
1
”
b
y
w
r
i
t
i
n
g
a
“
1
”
i
n
a
p
r
o
g
r
a
m
.
(
W
r
i
t
i
n
g
a
“
0
”
h
a
s
n
o
e
f
f
e
c
t
.
)
0 : Watchdog timer interrupt
1 : Watchdog timer reset
(2)
W
D
T
i
n
t
e
r
r
u
p
t
/
r
e
s
e
t
s
w
i
t
c
h
b
i
t
PM12
R
W
0
(
b
1
)
0
S
e
t
t
o
“
0
”
(
b
0
)
Reserved bit
Nothing is assigned. When write, set to “0”. When read, its
content is 0.
(
b
6
-
b
3
)
0
R
W
S
e
t
t
o
“
0
”
R
e
s
e
r
v
e
d
b
i
t
R
W
S
e
t
t
o
“
0
”
(b7)
R
e
s
e
r
v
e
d
b
i
t
Processor mode
Access space Pins which are assigned I/O ports
Single-chip mode SFR, internal RAM, internal ROM
All pins are I/O ports or peripheral
function I/O pins
(8 strony)
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